Katsuya Miura

According to our database, Katsuya Miura authored at least 7 papers between 2007 and 2012.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of five.

2012

Implementation of a perpendicular MTJ-based read-disturb-tolerant 2T-2R nonvolatile TCAM based on a reversed current reading scheme.

Shoun Matsunaga, Masanori Natsui, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2010

A 32-Mb SPRAM With 2T1R Memory Cell, Localized Bi-Directional Write Driver and '1'/'0' Dual-Array Equalized Reference Scheme.

Riichiro Takemura, Takayuki Kawahara, Katsuya Miura, Hiroyuki Yamamoto, Jun Hayakawa, Nozomu Matsuzaki, Kazuo Ono, Michihiko Yamanouchi, Kenchi Ito, Hiromasa Takahashi, Shoji Ikeda, Haruhiro Hasegawa, Hideyuki Matsuoka, Hideo Ohno

IEEE J. Solid State Circuits, 2010

Transient Characteristic of Fabricated Magnetic Tunnel Junction (MTJ) Programmed with CMOS Circuit.

Masashi Kamiyanagi, Fumitaka Iga, Shoji Ikeda, Katsuya Miura, Jun Hayakawa, Haruhiro Hasegawa, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh

IEICE Trans. Electron., 2010

Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuits.

Fumitaka Iga, Masashi Kamiyanagi, Shoji Ikeda, Katsuya Miura, Jun Hayakawa, Haruhiro Hasegawa, Takahiro Hanyu, Hideo Ohno, Tetsuo Endoh

IEICE Trans. Electron., 2010

2009

MTJ-based nonvolatile logic-in-memory circuit, future prospects and issues.

Shoun Matsunaga, Jun Hayakawa, Shoji Ikeda, Katsuya Miura, Tetsuo Endoh, Hideo Ohno, Takahiro Hanyu

Proceedings of the Design, Automation and Test in Europe, 2009

2008

2 Mb SPRAM (SPin-Transfer Torque RAM) With Bit-by-Bit Bi-Directional Current Write and Parallelizing-Direction Current Read.

Takayuki Kawahara, Riichiro Takemura, Katsuya Miura, Jun Hayakawa, Shoji Ikeda, Young Min Lee, Ryutaro Sasaki, Yasushi Goto, Kenchi Ito, Toshiyasu Meguro, Fumihiro Matsukura, Hiromasa Takahashi, Hideyuki Matsuoka, Hideo Ohno

IEEE J. Solid State Circuits, 2008

2007

2Mb Spin-Transfer Torque RAM (SPRAM) with Bit-by-Bit Bidirectional Current Write and Parallelizing-Direction Current Read.

Takayuki Kawahara, Riichiro Takemura, Katsuya Miura, Jun Hayakawa, Shoji Ikeda, Young Min Lee, Ryutaro Sasaki, Yasushi Goto, Kenchi Ito, Toshiyasu Meguro, Fumihiro Matsukura, Hiromasa Takahashi, Hideyuki Matsuoka, Hideo Ohno

Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007