Kizheppatt Vipin

Orcid: 0000-0002-1013-7727

Affiliations:
  • Nazarbayev University, Astana, Kazakhstan


According to our database1, Kizheppatt Vipin authored at least 35 papers between 2011 and 2023.

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Bibliography

2023
Accelerating DNA Sequence Analysis using Content-Addressable Memory in FPGAs.
Proceedings of the 8th IEEE International Conference on Smart Cloud, 2023

2022
Reconfigurable Wireless PHY with Dynamically Controlled Out-of-Band Emission on Zynq SoC.
Proceedings of the 65th IEEE International Midwest Symposium on Circuits and Systems, 2022

2021
On the Suitability of Read only Memory for FPGA-Based CAM Emulation Using Partial Reconfiguration.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2021

2020
High Throughput Accelerator Interface Framework for a Linear Time-Multiplexed FPGA Overlay.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

StocNoC: Accelerating Stochastic Models Through Reconfigurable Network on Chip Architectures.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2020

2019
AsyncBTree: Revisiting Binary Tree Topology for Efficient FPGA-Based NoC Implementation.
Int. J. Reconfigurable Comput., 2019

OpenNoC: An Open-Source NoC Infrastructure for FPGA-Based Hardware Acceleration.
IEEE Embed. Syst. Lett., 2019

Reconfigurable Threshold Logic Networks in FPGA for Moving Object Detection.
Proceedings of the 62nd IEEE International Midwest Symposium on Circuits and Systems, 2019

HBLast: An Open-Source FPGA Library for DNA Sequencing Acceleration.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

ZyNet: Automating Deep Neural Network Implementation on Low-Cost Reconfigurable Edge Computing Platforms.
Proceedings of the International Conference on Field-Programmable Technology, 2019

2018
FPGA Dynamic and Partial Reconfiguration: A Survey of Architectures, Methods, and Applications.
ACM Comput. Surv., 2018

Memristor-based Synaptic Sampling Machines.
CoRR, 2018

CANNoC: An open-source NoC architecture for ECU consolidation.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2017
Virtualized Execution Runtime for FPGA Accelerators in the Cloud.
IEEE Access, 2017

Enabling partial reconfiguration and low latency routing using segmented FPGA NoCs.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
JetStream: An open-source high-performance PCI Express 3 streaming library for FPGA-to-Host and FPGA-to-FPGA communication.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Designing a virtual runtime for FPGA accelerators in the cloud.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

2015
Design automation for partially reconfigurable adaptive systems
PhD thesis, 2015

MiCAP: a custom reconfiguration controller for dynamic circuit specialization.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Dynamic Cognitive Radios on the Xilinx Zynq Hybrid FPGA.
Proceedings of the Cognitive Radio Oriented Wireless Networks, 2015

Virtualized FPGA Accelerators for Efficient Cloud Computing.
Proceedings of the 7th IEEE International Conference on Cloud Computing Technology and Science, 2015

Mapping adaptive hardware systems with partial reconfiguration using CoPR for Zynq.
Proceedings of the 2015 NASA/ESA Conference on Adaptive Hardware and Systems, 2015

2014
ZyCAP: Efficient Partial Reconfiguration Management on the Xilinx Zynq.
IEEE Embed. Syst. Lett., 2014

DyRACT: A partial reconfiguration enabled accelerator and test platform.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

Automated Partial Reconfiguration Design for Adaptive Systems with CoPR for Zynq.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

Mapping Time-Critical Safety-Critical Cyber Physical Systems to Hybrid FPGAs.
Proceedings of the 2014 IEEE International Conference on Cyber-Physical Systems, 2014

2013
Automated Partitioning for Partial Reconfiguration Design of Adaptive Systems.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

System-level FPGA device driver with high-level synthesis support.
Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

An Approach to a Fully Automated Partial Reconfiguration Design Flow.
Proceedings of the 21st IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2013

An approach for redundancy in FlexRay networks using FPGA partial reconfiguration.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
A high speed open source controller for FPGA Partial Reconfiguration.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

Architecture-Aware Reconfiguration-Centric Floorplanning for Partial Reconfiguration.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2012

2011
Efficient region allocation for adaptive partial reconfiguration.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

A threat-based Connect6 implementation on FPGA.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

Enabling high level design of adaptive systems with partial reconfiguration.
Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011


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