Krishna T. Malladi

According to our database1, Krishna T. Malladi authored at least 25 papers between 2009 and 2021.

Collaborative distances:

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021

2020
NMTSim: Transaction-Command Based Simulator for New Memory Technology Devices.
IEEE Comput. Archit. Lett., 2020

NEST: DIMM based Near-Data-Processing Accelerator for K-mer Counting.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
Multi-Tier Buffer Management and Storage System Design for Non-Volatile Memory.
CoRR, 2019

CoNDA: efficient cache coherence support for near-data accelerators.
Proceedings of the 46th International Symposium on Computer Architecture, 2019

2018
SCOPE: A Stochastic Computing Engine for DRAM-Based In-Situ Accelerator.
Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

2017
DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric.
IEEE Micro, 2017

LazyPIM: Efficient Support for Cache Coherence in Processing-in-Memory Architectures.
CoRR, 2017

Clustered maximum weight clique problem: Algorithms and empirical analysis.
Comput. Oper. Res., 2017

LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory.
IEEE Comput. Archit. Lett., 2017

Rack Level Scheduling for Containerized Workloads.
Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017

FlashStorageSim: Performance Modeling for SSD Architectures.
Proceedings of the 2017 International Conference on Networking, Architecture, and Storage, 2017

DRISA: a DRAM-based reconfigurable in-situ accelerator.
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

Docker characterization on high performance SSDs.
Proceedings of the 2017 IEEE International Symposium on Performance Analysis of Systems and Software, 2017

2016
Software-Defined Emulation Infrastructure for High Speed Storage.
Proceedings of the 9th ACM International on Systems and Storage Conference, 2016

DRAMScale: Mechanisms to Increase DRAM Capacity.
Proceedings of the Second International Symposium on Memory Systems, 2016

DRAMPersist: Making DRAM Systems Persistent.
Proceedings of the Second International Symposium on Memory Systems, 2016

KOVA : A tool for kernel visualization and analysis.
Proceedings of the 35th IEEE International Performance Computing and Communications Conference, 2016

FlexDrive: A Framework to Explore NVMe Storage Solutions.
Proceedings of the 18th IEEE International Conference on High Performance Computing and Communications; 14th IEEE International Conference on Smart City; 2nd IEEE International Conference on Data Science and Systems, 2016

2015
FAME: A Fast and Accurate Memory Emulator for New Memory System Architecture Exploration.
Proceedings of the 23rd IEEE International Symposium on Modeling, 2015

A Network Model for the Hospital Routing Problem.
Proceedings of the ICORES 2015, 2015

2012
An ejection-chain heuristic for the satellite downlink scheduling problem: A case study with RADARSAT-2
CoRR, 2012

Rethinking DRAM Power Modes for Energy Proportionality.
Proceedings of the 45th Annual IEEE/ACM International Symposium on Microarchitecture, 2012

Towards energy-proportional datacenter memory with mobile DRAM.
Proceedings of the 39th International Symposium on Computer Architecture (ISCA 2012), 2012

2009
Analog Implementation of SNR based Gain Adaptation for Denoising.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009


  Loading...