Uksong Kang

According to our database¹, Uksong Kang authored at least 7 papers between 2006 and 2019.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

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Bibliography

2019

Dataplant: In-DRAM Security Mechanisms for Low-Cost Devices.

[BibT_eX]

[DOI]

CoRR, 2019

2016

DRAMScale: Mechanisms to Increase DRAM Capacity.

[BibT_eX]

[DOI]

Proceedings of the Second International Symposium on Memory Systems, 2016

18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2010

8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2010

2009

8Gb 3D DDR3 DRAM using through-silicon-via technology.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007

An 8 Gb/s/pin 9.6 ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I/O Error Detection Scheme.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 2007

2006

An 8Gb/s/pin 9.6ns Row-Cycle 288Mb Deca-Data Rate SDRAM with an I/O Error-Detection Scheme.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

Uksong Kang

Timeline

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