Wenqin Huangfu

According to our database1, Wenqin Huangfu authored at least 13 papers between 2016 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2023
ASMCap: An Approximate String Matching Accelerator for Genome Sequence Analysis Based on Capacitive Content Addressable Memory.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022
BEACON: Scalable Near-Data-Processing Accelerators for Genome Analysis near Memory Pool with the CXL Support.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022

2021
Brain-Inspired Computing: Adventure from Beyond CMOS Technologies to Beyond von Neumann Architectures ICCAD Special Session Paper.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

2020
NMTSim: Transaction-Command Based Simulator for New Memory Technology Devices.
IEEE Comput. Archit. Lett., 2020

NEST: DIMM based Near-Data-Processing Accelerator for K-mer Counting.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019
MEDAL: Scalable DIMM based Near Data Processing Accelerator for DNA Seeding Algorithm.
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Efficient System Architecture in the Era of Monolithic 3D: Dynamic Inter-tier Interconnect and Processing-in-Memory.
Proceedings of the 56th Annual Design Automation Conference 2019, 2019

2018
Stuck-at Fault Tolerance in RRAM Computing Systems.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

RADAR: a 3D-reRAM based DNA alignment accelerator architecture.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Computation-oriented fault-tolerance schemes for RRAM computing systems.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016
Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication.
J. Comput. Sci. Technol., 2016

MNSIM: Simulation platform for memristor-based neuromorphic computing system.
Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

Switched by input: power efficient structure for RRAM-based convolutional neural network.
Proceedings of the 53rd Annual Design Automation Conference, 2016


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