Labros Bisdounis

According to our database1, Labros Bisdounis authored at least 12 papers between 1993 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2011
Analytical Modeling of Overshooting Effect in Sub-100 nm CMOS inverters.
Journal of Circuits, Systems, and Computers, 2011

2010
Short-circuit energy dissipation model for sub-100nm CMOS buffers.
Proceedings of the 17th IEEE International Conference on Electronics, 2010

2006
Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications.
J. Low Power Electronics, 2006

2005
Instruction level energy modeling for pipelined processors.
J. Embedded Computing, 2005

Energy-Aware System-on-Chip for 5 GHz Wireless LANs.
Proceedings of the Integrated Circuit and System Design, 2005

2004
A Multi-level Validation Methodology for Wireless Network Applications.
Proceedings of the Integrated Circuit and System Design, 2004

A Simulation-Based Power-Aware Architecture Exploration of a Multiprocessor System-on-Chip Design.
Proceedings of the 2004 Design, 2004

2002
Instrumentation Set-up for Instruction Level Power Modeling.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

1998
Analytical Model for the CMOS Short-Circuit Power Dissipation.
Integrated Computer-Aided Engineering, 1998

Switching Response Modeling of the CMOS Inverter for Sub-micron Devices.
Proceedings of the 1998 Design, 1998

1996
Accurate evaluation of CMOS short-circuit power dissipation for short-channel devices.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

1993
VLSI implementation of digit-serial arithmetic modules.
Microprocessing and Microprogramming, 1993


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