Spyros Blionas

According to our database1, Spyros Blionas authored at least 18 papers between 1996 and 2012.

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Bibliography

2012
FPGA-based machine vision implementation for Lab-on-Chip flow detection.
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

2008
Microarchitecture of a MultiCore SoC for Data Analysis of a Lab-on-Chip Microarray.
EURASIP J. Adv. Sig. Proc., 2008

2006
Implementation Strategy and Results of an Energy-Aware System-on-Chip for 5 GHz WLAN Applications.
J. Low Power Electronics, 2006

2005
Instruction level energy modeling for pipelined processors.
J. Embedded Computing, 2005

Physical Layer of a Base-band OFDM Modem: Algorithms and Performance.
Journal of Circuits, Systems, and Computers, 2005

Energy-Aware System-on-Chip for 5 GHz Wireless LANs.
Proceedings of the Integrated Circuit and System Design, 2005

2004
The low power analogue and digital baseband processing parts of a novel multimode DECT/GSM/DCS1800 terminal.
Microelectron. J., 2004

Rapid Prototyping of a Wireless LAN Implementation Using a UML-Based System Design Methodology.
IEICE Transactions, 2004

Hardware Building Blocks of a Mixed Granularity Reconfigurable System-on-Chip Platform.
Proceedings of the Integrated Circuit and System Design, 2004

A Multi-level Validation Methodology for Wireless Network Applications.
Proceedings of the Integrated Circuit and System Design, 2004

A reusable IP FFT core for DSP applications.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

2003
Realization of wireless multimedia communication systems on reconfigurable platforms.
Journal of Systems Architecture, 2003

Power Optimization Methdology for Multimedia Applications Implementation on Reconfigurable Platforms.
Proceedings of the Integrated Circuit and System Design, 2003

Alternative Direct Digital Frequency Synthesizer architectures with reduced memory size.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Architecture Design of a Reconfigurable Multiplier for Flexible Coarse-Grain Implementations.
Proceedings of the Field-Programmable Logic and Applications, 2002

A HIPERLAN/2 - IEEE 802.11a Reconfigurable System-on-Chip.
Proceedings of the Field-Programmable Logic and Applications, 2002

2001
On the implementation of a baseband processor for a portable dual mode DECT/GSM terminal.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

1996
Industrial approach in design methodologies for mobile communications systems.
Proceedings of the Seventh IEEE International Workshop on Rapid System Prototyping (RSP '96), 1996


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