Lana Josipovic

Emmet Murphy

CoRR, March, 2026

Graphiti Artefact ASPLOS 2026.

[BibT_eX]

[DOI]

Dataset, January, 2026

Graphiti Artefact ASPLOS 2026.

[BibT_eX]

[DOI]

Dataset, January, 2026

Graphiti Artefact ASPLOS 2026.

[BibT_eX]

[DOI]

Dataset, January, 2026

Graphiti Artefact ASPLOS 2026.

[BibT_eX]

[DOI]

Dataset, January, 2026

Graphiti Artefact ASPLOS 2026.

[BibT_eX]

[DOI]

Dataset, January, 2026

HACE: HLS-Tool-Agnostic CDFG Extraction from RTL Designs.

[BibT_eX]

[DOI]

Sebastian Pfeiler

Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2026

EagerlyElastic: Correct-by-Construction Eager Execution in Dynamically-Scheduled HLS.

[BibT_eX]

[DOI]

Shun Katsumi

Emmet Murphy

Proceedings of the 2026 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2026

Bridging the gap between software and hardware.

[BibT_eX]

[DOI]

Proceedings of the 23rd ACM International Conference on Computing Frontiers, 2026

Graphiti: Formally Verified Out-of-Order Execution in Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2026

2025

Graphiti Artefact ASPLOS 2026.

[BibT_eX]

[DOI]

Dataset, December, 2025

Graphiti Artefact ASPLOS 2026.

[BibT_eX]

[DOI]

Dataset, December, 2025

OptiPIM: Optimizing Processing-in-Memory Acceleration Using Integer Linear Programming.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual International Symposium on Computer Architecture, 2025

Promise: Property Mining for Sequential Synthesis.

[BibT_eX]

[DOI]

Jordi Cortadella

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

Resource and Phase Awareness for Dynamically Scheduled High-Level Synthesis.

[BibT_eX]

[DOI]

Mathias Bouilloud

Wayne Luk

Proceedings of the 15th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies, 2025

Compile in Seconds and Run on an FPGA with DynaRapid.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on Field-Programmable Logic and Applications, 2025

DRSA: Accelerating Macro Placement on Commercial FPGAs.

[BibT_eX]

[DOI]

Proceedings of the 33rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2025

SimGen: Simulation Pattern Generation for Efficient Equivalence Checking.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference, 2025

CRUSH: A Credit-Based Approach for Functional Unit Sharing in Dynamically Scheduled HLS.

[BibT_eX]

[DOI]

Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2025

ElasticMiter: Formally Verified Dataflow Circuit Rewrites.

[BibT_eX]

[DOI]

Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, 2025

2024

Balor: HLS Source Code Evaluator Based on Custom Graphs and Hierarchical GNNs.

[BibT_eX]

[DOI]

Emmet Murphy

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Fast Switching Activity Estimation for HLS-Produced Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

DynaRapid: Fast-Tracking from C to Routed Circuits.

[BibT_eX]

[DOI]

Proceedings of the 34th International Conference on Field-Programmable Logic and Applications, 2024

Suppressing Spurious Dynamism of Dataflow Circuits via Latency and Occupancy Balancing.

[BibT_eX]

[DOI]

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

DynaRapid: From C to FPGA in a Few Seconds.

[BibT_eX]

[DOI]

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

Survival of the Fastest: Enabling More Out-of-Order Execution in Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2024 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2024

FPGA EDA - Design Principles and Implementation

[BibT_eX]

[DOI]

Springer, ISBN: 978-981-99-7754-3, 2024

2023

Parallelising Control Flow in Dynamic-scheduling High-level Synthesis.

[BibT_eX]

[DOI]

ACM Trans. Reconfigurable Technol. Syst., December, 2023

Automatic Inductive Invariant Generation for Scalable Dataflow Circuit Verification.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

MapBuf: Simultaneous Technology Mapping and Buffer Insertion for HLS Performance Optimization.

[BibT_eX]

[DOI]

Hanyu Wang

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

Eliminating Excessive Dynamism of Dataflow Circuits Using Model Checking.

[BibT_eX]

[DOI]

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

Straight to the Queue: Fast Load-Store Queue Allocation in Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2023

An Iterative Method for Mapping-Aware Frequency Regulation in Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2022

From C/C++ Code to High-Performance Dataflow Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022

29th Reconfigurable Architectures Workshop (RAW 2022).

[BibT_eX]

[DOI]

Jürgen Becker

Ramachandran Vaidyanathan

Viktor K. Prasanna

Marco D. Santambrogio

Proceedings of the IEEE International Parallel and Distributed Processing Symposium, 2022

Load-Store Queue Sizing for Efficient Dataflow Circuits.

[BibT_eX]

[DOI]

Jiantao Liu

Proceedings of the International Conference on Field-Programmable Technology, 2022

A Comprehensive Timing Model for Accurate Frequency Tuning in Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Unleashing Parallelism in Elastic Circuits with Faster Token Delivery.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Dynamic Inter-Block Scheduling for HLS.

[BibT_eX]

[DOI]

Proceedings of the 32nd International Conference on Field-Programmable Logic and Applications, 2022

Resource Sharing in Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2022

2021

High-Level Synthesis of Dynamically Scheduled Circuits.

[BibT_eX]

[DOI]

PhD thesis, 2021

2020

Buffer Placement and Sizing for High-Performance Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Invited Tutorial: Dynamatic: From C/C++ to Dynamically Scheduled Circuits.

[BibT_eX]

[DOI]

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

Combining Dynamic & Static Scheduling in High-level Synthesis.

[BibT_eX]

[DOI]

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019

Shrink It or Shed It! Minimize the Use of LSQs in Dataflow Designs.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Field-Programmable Technology, 2019

Speculative Dataflow Circuits.

[BibT_eX]

[DOI]

Proceedings of the 2019 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2019

2018

Dynamically Scheduled High-level Synthesis.

[BibT_eX]

[DOI]

Radhika Ghosal

Proceedings of the 2018 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2018

2017

An Out-of-Order Load-Store Queue for Spatial Computing.

[BibT_eX]

[DOI]

Philip Brisk

Proceedings of the 25th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2017

From C to elastic circuits.

[BibT_eX]

[DOI]

Philip Brisk

Proceedings of the 51st Asilomar Conference on Signals, Systems, and Computers, 2017

2016

Enriching C-based High-Level Synthesis with parallel pattern templates.

[BibT_eX]

[DOI]

Nithin George