Larry McMurchie

According to our database1, Larry McMurchie
  • authored at least 12 papers between 1988 and 2005.
  • has a "Dijkstra number"2 of three.

Timeline

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Links

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Bibliography

2005
409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS.
Proceedings of the 2005 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2005), 2005

2004
A high performance CMOS programmable logic core.
Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2002
WTA: waveform-based timing analysis for deep submicron circuits.
Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001
A High-Performance 64-bit Adder Implemented in Output Prediction Logic.
Proceedings of the 19th Conference on Advanced Research in VLSI (ARVLSI 2001), 2001

2000
Distributed-memory parallel routing for field-programmable gatearrays.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

Output Prediction Logic: A High-Performance CMOS Design Technique.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

1996
Emerald: An Architecture-Driven Tool Compiler for FPGAs.
Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, 1996

1995
Placement and routing tools for the Triptych FPGA.
IEEE Trans. VLSI Syst., 1995

PathFinder: A Negotiation-based Performance-driven Router for FPGAs.
Proceedings of the Third International ACM Symposium on Field-Programmable Gate Arrays, 1995

1991
Hybrid compiled/interpreted simulation of MOS circuits.
Proceedings of the conference on European design automation, 1991

1989
Apex: two architectures for generating parametric curves and surfaces.
The Visual Computer, 1989

1988
A Notation for Describing Multiple Views of VLSI Circuits.
Proceedings of the 25th ACM/IEEE Conference on Design Automation, 1988


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