Brendan Farley

According to our database1, Brendan Farley authored at least 14 papers between 2013 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

On csauthors.net:

Bibliography

2023
Software Abstraction of Next Generation Radio Access Networks.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023

2019
A 1-V Bandgap Reference in 7-nm FinFET With a Programmable Temperature Coefficient and Inaccuracy of ±0.2% From -45°C to 125°C.
IEEE J. Solid State Circuits, 2019

2018
An All-Programmable 16-nm RFSoC for Digital-RF Communications.
IEEE Micro, 2018


A modular 16NM Direct-RF TX/RX Embedding 9GS/S DAC and 4.5GS/S ADC with 90DB Isolation and Sub-80PS Channel Alignment for Monolithic Integration in 5G Base-Station SoC.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

A 7.4-to-14GHz PLL with 54fsrms jitter in 16nm FinFET for integrated RF-data-converter SoCs.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

BJT Device and Circuit Co-Optimization Enabling Bandgap Reference and Temperature Sensing in 7-nm FinFET.
Proceedings of the 48th European Solid-State Device Research Conference, 2018

A 1 V Bandgap Reference in 7-nm FinFET with a Programmable Temperature Coefficient and an Inaccuracy of ±0.2% from -45°C to 125°C.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

2017
16.1 A 13b 4GS/s digitally assisted dynamic 3-stage asynchronous pipelined-SAR ADC.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

16.3 A 330mW 14b 6.8GS/s dual-mode RF DAC in 16nm FinFET achieving -70.8dBc ACPR in a 20MHz channel at 5.2GHz.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

A programmable RFSoC in 16nm FinFET technology for wideband communications.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2017

2015
A Heterogeneous 3D-IC Consisting of Two 28 nm FPGA Die and 32 Reconfigurable High-Performance Data Converters.
IEEE J. Solid State Circuits, 2015

2014
6.3 A Heterogeneous 3D-IC consisting of two 28nm FPGA die and 32 reconfigurable high-performance data converters.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
Panel: "will 3D-IC remain a technology of the future... even in the future?".
Proceedings of the Design, Automation and Test in Europe, 2013


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