Loke Tan

According to our database1, Loke Tan authored at least 11 papers between 1995 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2016
A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable Receiver.
IEEE J. Solid State Circuits, 2016

2015

2013
A 240-mW 2.1-GS/s 52-dB SNDR Pipeline ADC Using MDAC Equalization.
IEEE J. Solid State Circuits, 2013

2012
A 240mW 2.1GS/s 12b pipeline ADC using MDAC equalization.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2009
An Embedded 65 nm CMOS Baseband IQ 48 MHz-1 GHz Dual Tuner for DOCSIS 3.0.
IEEE J. Solid State Circuits, 2009


1999
Correction to "A 70-Mb/s Variable-Rate 1024-QAM Cable Receiver IC with Integrated 10-b ADC and FEC Decoder".
IEEE J. Solid State Circuits, 1999

A single-chip universal cable set-top box/modem transceiver.
IEEE J. Solid State Circuits, 1999

1998
A 70-Mb/s variable-rate 1024-QAM cable receiver IC with integrated 10-b ADC and FEC decoder.
IEEE J. Solid State Circuits, 1998

1995
An 800-MHz quadrature digital synthesizer with ECL-compatible output drivers in 0.8 μm CMOS.
IEEE J. Solid State Circuits, December, 1995

A 200 MHz quadrature digital synthesizer/mixer in 0.8 μm CMOS.
IEEE J. Solid State Circuits, March, 1995


  Loading...