Massimo Brandolini

According to our database1, Massimo Brandolini authored at least 15 papers between 2003 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2016
A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable Receiver.
IEEE J. Solid State Circuits, 2016

27.6 A 4GS/s 13b pipelined ADC with capacitor and amplifier sharing in 16nm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
A 5 GS/s 150 mW 10 b SHA-Less Pipelined/SAR Hybrid ADC for Direct-Sampling Systems in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015



2009
An Embedded 65 nm CMOS Baseband IQ 48 MHz-1 GHz Dual Tuner for DOCSIS 3.0.
IEEE J. Solid State Circuits, 2009


2007
A 750 mV Fully Integrated Direct Conversion Receiver Front-End for GSM in 90-nm CMOS.
IEEE J. Solid State Circuits, 2007

2006
A 0.13 μm CMOS front-end, for DCS1800/UMTS/802.11b-g with multiband positive feedback low-noise amplifier.
IEEE J. Solid State Circuits, 2006

A 0.18-$muhbox m$CMOS Selective Receiver Front-End for UWB Applications.
IEEE J. Solid State Circuits, 2006

A +78 dBm IIP2 CMOS direct downconversion mixer for fully integrated UMTS receivers.
IEEE J. Solid State Circuits, 2006

A 750mV 15kHz 1/f Noise Corner 51dBm IIP2 Direct-Conversion Front-End for GSM in 90nm CMOS.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2005
A variable gain RF front-end, based on a Voltage-Voltage feedback LNA, for multistandard applications.
IEEE J. Solid State Circuits, 2005

An interference robust 0.18μm CMOS 3.1-8GHz receiver front-end for UWB radio.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2003
Second-order intermodulation mechanisms in CMOS downconverters.
IEEE J. Solid State Circuits, 2003


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