Mahmood Fazlali

  • Delft University of Technology, Netherlands

According to our database1, Mahmood Fazlali authored at least 26 papers between 2006 and 2021.

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PhD thesis 


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Accelerating Louvain community detection algorithm on graphic processing unit.
J. Supercomput., 2021

Parallel branch and bound algorithm for solving integer linear programming models derived from behavioral synthesis.
Parallel Comput., 2021

Parallel Quadri-valent Quantum-Inspired Gravitational Search Algorithm on a heterogeneous platform for wireless sensor networks.
Comput. Electr. Eng., 2021

A Novel Method for Reconstructing CT Images in GATE/GEANT4 with Application in Medical Imaging: A Complexity Analysis Approach.
J. Inf. Process., 2020

Scalable Parallel Genetic Algorithm For Solving Large Integer Linear Programming Models Derived From Behavioral Synthesis.
Proceedings of the 28th Euromicro International Conference on Parallel, 2020

High-speed GPU implementation of a secret sharing scheme based on cellular automata.
J. Supercomput., 2019

Accelerating datapath merging by task parallelisation on multicore systems.
Int. J. Parallel Emergent Distributed Syst., 2019

Raft Consensus Algorithm: an Effective Substitute for Paxos in High Throughput P2P-based Systems.
CoRR, 2019

Community-based replica management in distributed systems.
Int. J. Web Inf. Syst., 2018

On complexity of post-processing in analyzing GATE-driven X-ray spectrum.
CoRR, 2018

A hybrid bio-inspired learning algorithm for image segmentation using multilevel thresholding.
Multim. Tools Appl., 2017

Adaptive parallel Louvain community detection on a multicore platform.
Microprocess. Microsystems, 2017

Parallel implementation of quorum planted (ℓ, d) motif search on multi-core/many-core platforms.
Microprocess. Microsystems, 2016

Metamorphic malware detection using opcode frequency rate and decision tree.
Int. J. Inf. Secur. Priv., 2016

Fast architecture for decimal digit multiplication.
Microprocess. Microsystems, 2015

Linear principal transformation: toward locating features in N-dimensional image space.
Multim. Tools Appl., 2014

Clustering Persian viseme using phoneme subspace for developing visual speech application.
Multim. Tools Appl., 2013

High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Efficient datapath merging for the overhead reduction of run-time reconfigurable systems.
J. Supercomput., 2012

Generalised fault-tolerant stored-unibit-transfer residue number system multiplier for moduli set {2<sup>n</sup> - 1, 2<sup>n</sup>, 2<sup>n</sup> + 1}.
IET Comput. Digit. Tech., 2012

Efficient task scheduling for runtime reconfigurable systems.
J. Syst. Archit., 2010

A unified addition structure for moduli set {2<sup>n</sup>-1, 2<sup>n</sup>, 2<sup>n</sup>+1} based on a novel RNS representation.
Proceedings of the 28th International Conference on Computer Design, 2010

A Modified Merging Approach for Datapath Configuration Time Reduction.
Proceedings of the Reconfigurable Computing: Architectures, 2010

Data path Configuration Time Reduction for Run-time Reconfigurable Systems.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009

A New Datapath Merging Method for Reconfigurable System.
Proceedings of the Reconfigurable Computing: Architectures, 2009

Reversible Implementation of Densely-Packed-Decimal Converter to and from Binary-Coded-Decimal Format Using in IEEE-754R.
Proceedings of the 9th International Conference in Information Technology, 2006