Mahmood Fazlali
Affiliations: Delft University of Technology, Netherlands
According to our database^{1},
Mahmood Fazlali
authored at least 26 papers
between 2006 and 2021.
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Bibliography
2021
J. Supercomput., 2021
Parallel branch and bound algorithm for solving integer linear programming models derived from behavioral synthesis.
Parallel Comput., 2021
Parallel Quadrivalent QuantumInspired Gravitational Search Algorithm on a heterogeneous platform for wireless sensor networks.
Comput. Electr. Eng., 2021
2020
A Novel Method for Reconstructing CT Images in GATE/GEANT4 with Application in Medical Imaging: A Complexity Analysis Approach.
J. Inf. Process., 2020
Scalable Parallel Genetic Algorithm For Solving Large Integer Linear Programming Models Derived From Behavioral Synthesis.
Proceedings of the 28th Euromicro International Conference on Parallel, 2020
2019
Highspeed GPU implementation of a secret sharing scheme based on cellular automata.
J. Supercomput., 2019
Int. J. Parallel Emergent Distributed Syst., 2019
Raft Consensus Algorithm: an Effective Substitute for Paxos in High Throughput P2Pbased Systems.
CoRR, 2019
2018
Int. J. Web Inf. Syst., 2018
CoRR, 2018
2017
A hybrid bioinspired learning algorithm for image segmentation using multilevel thresholding.
Multim. Tools Appl., 2017
Microprocess. Microsystems, 2017
2016
Parallel implementation of quorum planted (ℓ, d) motif search on multicore/manycore platforms.
Microprocess. Microsystems, 2016
Int. J. Inf. Secur. Priv., 2016
2015
Microprocess. Microsystems, 2015
2014
Linear principal transformation: toward locating features in Ndimensional image space.
Multim. Tools Appl., 2014
2013
Clustering Persian viseme using phoneme subspace for developing visual speech application.
Multim. Tools Appl., 2013
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and SystemonChip, 2013
2012
Efficient datapath merging for the overhead reduction of runtime reconfigurable systems.
J. Supercomput., 2012
Generalised faulttolerant storedunibittransfer residue number system multiplier for moduli set {2<sup>n</sup>  1, 2<sup>n</sup>, 2<sup>n</sup> + 1}.
IET Comput. Digit. Tech., 2012
2010
J. Syst. Archit., 2010
A unified addition structure for moduli set {2<sup>n</sup>1, 2<sup>n</sup>, 2<sup>n</sup>+1} based on a novel RNS representation.
Proceedings of the 28th International Conference on Computer Design, 2010
Proceedings of the Reconfigurable Computing: Architectures, 2010
2009
Data path Configuration Time Reduction for Runtime Reconfigurable Systems.
Proceedings of the 2009 International Conference on Engineering of Reconfigurable Systems & Algorithms, 2009
Proceedings of the Reconfigurable Computing: Architectures, 2009
2006
Reversible Implementation of DenselyPackedDecimal Converter to and from BinaryCodedDecimal Format Using in IEEE754R.
Proceedings of the 9th International Conference in Information Technology, 2006