Charles Chiasson

According to our database, Charles Chiasson authored at least 5 papers between 2013 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2020

Optimizing FPGA Logic Block Architectures for Arithmetic.

Kevin E. Murray, Jason Luu, Matthew J. P. Walker, Conor McCullough, Sen Wang, Safeen Huda, Bo Yan, Charles Chiasson, Kenneth B. Kent, Jason Helge Anderson, Jonathan Rose, Vaughn Betz

IEEE Trans. Very Large Scale Integr. Syst., 2020

Architectural Enhancements in Intel® Agilex™ FPGAs.

Jeffrey Chromczak, Mark Wheeler, Charles Chiasson, Dana How, Martin Langhammer, Tim Vanderhoek, Grace Zgheib, Ilya Ganusov

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2014

On Hard Adders and Carry Chains in FPGAs.

Jason Luu, Conor McCullough, Sen Wang, Safeen Huda, Bo Yan, Charles Chiasson, Kenneth B. Kent, Jason Helge Anderson, Jonathan Rose, Vaughn Betz

Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014

2013

COFFE: Fully-automated transistor sizing for FPGAs.

Charles Chiasson, Vaughn Betz

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Should FPGAS abandon the pass-gate?

Charles Chiasson, Vaughn Betz

Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013