Menglin Han

According to our database1, Menglin Han authored at least 8 papers between 2018 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
A Self-Timed Voltage-Mode Sensing Scheme With Successive Sensing and Checking for STT-MRAM.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020

Interplay Bitwise Operation in Emerging MRAM for Efficient In-memory Computing.
CCF Trans. High Perform. Comput., 2020

2019
A Self-Timing Voltage-Mode Sense Amplifier for STT-MRAM Sensing Yield Improvement.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Comprehensive Pulse Shape Induced Failure Analysis in Voltage-Controlled MRAM.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Voltage-Controlled Magnetoelectric Memory Bit-cell Design With Assisted Body-bias in FD-SOI.
Proceedings of the 2019 on Great Lakes Symposium on VLSI, 2019

2018
Reliability Emphasized MTJ/CMOS Hybrid Circuit Towards Ultra-Low Power.
Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

Stability and Variability Emphasized STT-MRAM Sensing Circuit With Performance Enhancement.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018


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