Zhaohao Wang

Orcid: 0000-0002-2999-7903

According to our database1, Zhaohao Wang authored at least 76 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Variation Aware Evaluation Approach and Design Methodology for SOT-MRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., April, 2024

Area and Energy Efficient Short-Circuit-Logic-Based STT-MRAM Crossbar Array for Binary Neural Networks.
IEEE Trans. Circuits Syst. II Express Briefs, March, 2024

A High Throughput In-MRAM-Computing Scheme Using Hybrid p-SOT-MTJ/GAA-CNTFET.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2024

2023
IMGA: Efficient In-Memory Graph Convolution Network Aggregation With Data Flow Optimizations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

The granulation attribute reduction of multi-label data.
Appl. Intell., August, 2023

Layout Aware Optimization Methodology for SOT-MRAM Based on Technically Feasible Top-Pinned Magnetic Tunnel Junction Process.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2023

NAND-SPIN-based processing-in-MRAM architecture for convolutional neural network acceleration.
Sci. China Inf. Sci., April, 2023

An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs.
IEEE Trans. Emerg. Top. Comput., 2023

A Robust Time-based Error-Proofing Readout Scheme for MRAM.
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

A Reconfigurable and Machine Learning attack resistant strong PUF based on Arbiter Mechanism and SOT-MRAM.
Proceedings of the 18th ACM International Symposium on Nanoscale Architectures, 2023

Full reliability characterization of three-terminal SOT-MTJ devices and corresponding arrays.
Proceedings of the IEEE International Reliability Physics Symposium, 2023

2022
A Spintronic In-Memory Computing Network for Efficient Hamming Codec Implementation.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

Reconfigurable and Dynamically Transformable In-Cache-MPUF System With True Randomness Based on the SOT-MRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Comparison research on binary relations based on transitive degrees and cluster degrees.
CoRR, 2022

Parallel Computing in Memory Paradigm based on Reconfigurable Spin-Orbit Torque.
Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022

Approximate computation based on NAND-SPIN MRAM for CNN on-chip training.
Proceedings of the 17th ACM International Symposium on Nanoscale Architectures, 2022

Two-bit multi-level spin orbit torque MRAM with the fully one-step write operation.
Proceedings of the 2022 IEEE International Conference on Integrated Circuits, 2022

2021
Proposal of High Density Two-Bits-Cell Based NAND-Like Magnetic Random Access Memory.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A NAND-SPIN-Based Magnetic ADC.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

A New Description of Transversal Matroids Through Rough Set Approach.
Fundam. Informaticae, 2021

Proposal of A Novel Hybrid NAND-Like MRAM/DRAM Memory Architecture.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2021

Soft Error Sensitivity of Magnetic Random Access Memory and Its Radiation Hardening Design.
Proceedings of the 18th International SoC Design Conference, 2021

Computing-in-Memory Paradigm Based on STT-MRAM with Synergetic Read/Write-Like Modes.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
Bulkyflip: A NAND-SPIN-Based Last-Level Cache With Bandwidth-Oriented Write Management Policy.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Field-Free 3T2SOT MRAM for Non-Volatile Cache Memories.
IEEE Trans. Circuits Syst., 2020

A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020

The uncertainty measures for covering rough set models.
Soft Comput., 2020

A Comparative Cross-layer Study on Racetrack Memories: Domain Wall vs Skyrmion.
ACM J. Emerg. Technol. Comput. Syst., 2020

Computing-in-Memory Architecture Based on Field-Free SOT-MRAM with Self-Reference Method.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

PRISM: Energy-Efficient Polymorphic Operation Based on Spin-Orbit Torque Memory for Reconfigurable Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

2019
PXNOR-BNN: In/With Spin-Orbit Torque MRAM Preset-XNOR Operation-Based Binary Neural Networks.
IEEE Trans. Very Large Scale Integr. Syst., 2019

DASM: Data-Streaming-Based Computing in Nonvolatile Memory Architecture for Embedded System.
IEEE Trans. Very Large Scale Integr. Syst., 2019

Ultra-Dense Ring-Shaped Racetrack Memory Cache Design.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Novel Radiation Hardening Read/Write Circuits Using Feedback Connections for Spin-Orbit Torque Magnetic Random Access Memory.
IEEE Trans. Circuits Syst. I Regul. Pap., 2019

Exploiting Spin-Orbit Torque Devices As Reconfigurable Logic for Circuit Obfuscation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

The structures and the connections on four types of covering rough sets.
Soft Comput., 2019

Approximation via a double-matroid structure.
Soft Comput., 2019

The lattice and matroid representations of definable sets in generalized rough sets based on relations.
Inf. Sci., 2019

An Uncertainty Measure Based on Lower and Upper Approximations for Generalized Rough set Models.
Fundam. Informaticae, 2019

Erase-hidden and Drivability-improved Magnetic Non-Volatile Flip-Flops with NAND-SPIN Devices.
CoRR, 2019

Fuzzy Set-Valued Information Systems and the Algorithm of Filling Missing Values for Incomplete Information Systems.
Complex., 2019

Multi-Port 1R1W Transpose Magnetic Random Access Memory by Hierarchical Bit-Line Switching.
IEEE Access, 2019

Exploiting Near-Memory Processing Architectures for Bayesian Neural Networks Acceleration.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Pj-AxMTJ: Process-in-memory with Joint Magnetization Switching for Approximate Computing in Magnetic Tunnel Junction.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019

Ultra-fast and Energy-efficient Write-Computing Operation for Neuromorphic Computing.
Proceedings of the 2019 International SoC Design Conference, 2019

CORN: In-Buffer Computing for Binary Neural Network.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019

2018
Multi-bit nonvolatile flip-flop based on NAND-like spin transfer torque MRAM.
Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration, 2018

Write Energy Optimization for STT-MRAM Cache with Data Pattern Characterization.
Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Radiation hardening design for spin-orbit torque magnetic random access memory.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Progresses and challenges of spin orbit torque driven magnetization switching and application (Invited).
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Spintronics based stochastic computing for efficient Bayesian inference system.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018

High-Density and Fast-Configuration Non-Volatile Look-Up Table Based on NAND-Like Spintronic Memory.
Proceedings of the 2018 IEEE Asia Pacific Conference on Circuits and Systems, 2018

2017
Pseudo-Differential Sensing Framework for STT-MRAM: A Cross-Layer Perspective.
IEEE Trans. Computers, 2017

Reconfigurable processing in memory architecture based on spin orbit torque.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017

PRESCOTT: Preset-based cross-point architecture for spin-orbit-torque magnetic random access memory.
Proceedings of the 2017 IEEE/ACM International Conference on Computer-Aided Design, 2017

Advanced Low Power Spintronic Memories beyond STT-MRAM.
Proceedings of the on Great Lakes Symposium on VLSI 2017, 2017

Ultrafast spintronic integrated circuits.
Proceedings of the 12th IEEE International Conference on ASIC, 2017

2016
A rough set approach to the characterization of transversal matroids.
Int. J. Approx. Reason., 2016

A spin Hall effect-based multi-level cell for MRAM.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Evaluation of spin-Hall-assisted STT-MRAM for cache replacement.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

Approximate computing in MOS/spintronic non-volatile full-adder.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

2015
Spintronics: Emerging Ultra-Low-Power Circuits and Systems beyond MOS Technology.
ACM J. Emerg. Technol. Comput. Syst., 2015

The approximation number function and the characterization of covering approximation space.
Inf. Sci., 2015

Robust magnetic full-adder with voltage sensing 2T/2MTJ cell.
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale Architectures, 2015

2014
Design and analysis of crossbar architecture based on complementary resistive switching non-volatile memory cells.
J. Parallel Distributed Comput., 2014

On-chip supervised learning rule for ultra high density neural crossbar using memristor for synapse and neuron.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2014

Ferroelectric tunnel memristor-based neuromorphic network with 1T1R crossbar architecture.
Proceedings of the 2014 International Joint Conference on Neural Networks, 2014

An overview of spin-based integrated circuits.
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014

2013
A low-cost built-in error correction circuit design for STT-MRAM reliability improvement.
Microelectron. Reliab., 2013

Minimal Description and Maximal Description in Covering-based Rough Sets.
Fundam. Informaticae, 2013

Spin-electronics based logic fabrics.
Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

2012
Homomorphisms of Approximation Spaces.
J. Appl. Math., 2012

2011
On stability for switched linear positive systems.
Math. Comput. Model., 2011

Reduction of Neighborhood-Based Generalized Rough Sets.
J. Appl. Math., 2011

The characterization of some groups in terms of fuzzy orders.
Proceedings of the Eighth International Conference on Fuzzy Systems and Knowledge Discovery, 2011

2010
Several Equivalent Conditions of Fuzzy Subgroups of Some Groups.
Proceedings of the Fuzzy Information and Engineering 2010, 2010


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