Michele Caselli

Orcid: 0000-0003-3807-8033

According to our database1, Michele Caselli authored at least 24 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Model of a switched-capacitor programmable voltage reference for ultra low-power applications.
Integr., May, 2023

An Ultra Low-Power Programmable Voltage Reference for Power-Constrained Electronic Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., February, 2023

Modelling and Optimization of a Mixed-Signal Accelerator for Deep Neural Networks.
Proceedings of the 19th International Conference on Synthesis, 2023

A PWM-DAC for Analog In-Memory Computing in Mixed-Signal Accelerators.
Proceedings of the 18th Conference on Ph.D Research in Microelectronics and Electronics, 2023

Analog Baseband Circuits for Low-power 802-11ba Wake-up Radio in 40-nm CMOS.
Proceedings of the 21st IEEE Interregional NEWCAS Conference, 2023

A Low-Power Sample-and-Hold Programmable Voltage Reference Based on Ripple Monitoring.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

2022
Dynamic Quantization Range Control for Analog-in-Memory Neural Networks Acceleration.
ACM Trans. Design Autom. Electr. Syst., 2022

Memory Devices and A/D Interfaces: Design Tradeoffs in Mixed-Signal Accelerators for Machine Learning Applications.
IEEE Trans. Circuits Syst. II Express Briefs, 2022

A Low-Power Sigma-Delta Modulator for Healthcare and Medical Diagnostic Applications.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

Model of Switched-Capacitor Programmable Voltage Reference: Optimization for Ultra Low-Power Applications.
Proceedings of the 18th International Conference on Synthesis, 2022

An Ultra Low-Voltage RF Front-end Receiver for IoT Devices.
Proceedings of the 17th Conference on Ph.D Research in Microelectronics and Electronics, 2022

Write-Verify Scheme for IGZO DRAM in Analog in-Memory Computing.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

Tiny ci-SAR A/D Converter for Deep Neural Networks in Analog in-Memory Computation.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

An Integrated Low-power 802.11ba Wake-up Radio for IoT with Embedded Microprocessor.
Proceedings of the 29th IEEE International Conference on Electronics, Circuits and Systems, 2022

2021
A low-power native NMOS-based bandgap reference operating from -55°C to 125°C with Li-Ion battery compatibility.
Int. J. Circuit Theory Appl., 2021

Charge Sharing and Charge Injection A/D Converters for Analog In-Memory Computing.
Proceedings of the 19th IEEE International New Circuits and Systems Conference, 2021

An Integrated Low Power Temperature Sensor for Food Monitoring Applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A 6.5 nA Static Self-Calibrating Programmable Voltage Reference for Smart SoCs.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

Time-Multiplexed Flash ADC for Deep Neural Network Analog in-Memory Computing.
Proceedings of the 28th IEEE International Conference on Electronics, 2021

2020
Modeling and design of 3-D MPPT for ultra low power RF energy harvesters.
Integr., 2020

2019
Analysis and design of an integrated RF energy harvester for ultra low-power environments.
Int. J. Circuit Theory Appl., 2019

3-D Maximum Power Point Searching and Tracking for Ultra Low Power RF Energy Harvesters.
Proceedings of the 16th International Conference on Synthesis, 2019

Analysis of 3-D MPPT for RF Harvesting.
Proceedings of the Applications in Electronics Pervading Industry, Environment and Society, 2019

2017
A low power temperature sensor for IOT applications in CMOS 65nm technology.
Proceedings of the 7th IEEE International Conference on Consumer Electronics - Berlin, 2017


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