Yoshiaki Takeuchi

According to our database, Yoshiaki Takeuchi authored at least 7 papers between 2000 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

A 120mm² 16Gb 4-MLC NAND Flash Memory with 43nm CMOS Technology.

Kazushige Kanda, Masaru Koyanagi, Toshio Yamamura, Koji Hosono, Masahiro Yoshihara, Toru Miwa, Yosuke Kato, Alex Mak, Siu Lung Chan, Frank Tsai, Raul Cernea, Binh Le, Eiichi Makino, Takashi Taira, Hiroyuki Otake, Norifumi Kajimura, Susumu Fujimura, Yoshiaki Takeuchi, Mikihiko Itoh, Masanobu Shirakawa, Dai Nakamura, Yuya Suzuki, Yuki Okukawa, Masatsugu Kojima, Kazuhide Yoneya, Takamichi Arizono, Toshiki Hisada, Shinji Miyamoto, Mitsuhiro Noguchi, Toshitake Yaegashi, Masaaki Higashitani, Fumitoshi Ito, Teruhiko Kamei, Gertjan Hemink, Tooru Maruyama, Kazumi Ino, Shigeo Ohshima

Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

2006

A 146-mm² 8-gb multi-level NAND flash memory with 70-nm CMOS technology.

Takahiko Hara, Koichi Fukuda, Kazuhisa Kanazawa, Noboru Shibata, Koji Hosono, Hiroshi Maejima, Michio Nakagawa, Takumi Abe, Masatsugu Kojima, Masaki Fujiu, Yoshiaki Takeuchi, Kazumi Amemiya, Midori Morooka, Teruhiko Kamei, Hiroaki Nasu, Chi-Ming Wang, Kiyofumi Sakurai, Naoya Tokiwa, Hiroko Waki, Tohru Maruyama, Susumu Yoshikawa, Masaaki Higashitani, Tuan D. Pham, Yupin Fong, Toshiharu Watanabe

IEEE J. Solid State Circuits, 2006

2005

Recent activities on AMSR-E data utilization in NWP/JMA.

Toshiharu Tauchi, Yoshiaki Takeuchi, Yoshiaki Sato, Akio Narui, Sadao Saitoh

Proceedings of the IEEE International Geoscience & Remote Sensing Symposium, 2005

2004

Assimilation of the Aqua/AMSR-E data to numerical weather predictions.

Toshiharu Tauchi, Yoshiaki Takeuchi, Yoshiaki Sato

Proceedings of the 2004 IEEE International Geoscience and Remote Sensing Symposium, 2004

2003

A 32-Mb chain FeRAM with segment/stitch array architecture.

Shinichiro Shiratake, Tadashi Miyakawa, Yoshiaki Takeuchi, Ryu Ogiwara, Masahiro Kamoshida, Katsuhiko Hoya, Kohei Oikawa, Tohru Ozaki, Iwao Kunishima, Koji Yamakawa, Shigeki Sugimoto, Daisaburo Takashima, Hans-Oliver Joachim, Norbert Rehm, Joerg Wohlfahrt, Nicolas Nagel, Gerhard Beitel, Michael Jacob, Thomas Roehr

IEEE J. Solid State Circuits, 2003

2001

A 76-mm² 8-Mb chain ferroelectric memory.

Daisaburo Takashima, Yoshiaki Takeuchi, Tadashi Miyakawa, Yasuo Itoh, Ryu Ogiwara, Masahiro Kamoshida, Katsuhiko Hoya, Sumiko Mano Doumae, Tohru Ozaki, Hiroyuki Kanaya, Koji Yamakawa, Iwao Kunishima, Yukihito Oowaki

IEEE J. Solid State Circuits, 2001

2000

A 0.5-μm, 3-V 1T1C, 1-Mbit FRAM with a variable reference bit-line voltage scheme using a fatigue-free reference capacitor.

Ryu Ogiwara, Sumio Tanaka, Yasuo Itoh, Tadashi Miyakawa, Yoshiaki Takeuchi, Sumiko Mano Doumae, Hiroyuki Takenaka, Iwao Kunishima, Susumu Shuto, Osamu Hidaka, Sumito Ohtsuki, Shin'ichi Tanaka

IEEE J. Solid State Circuits, 2000