Koji Hosono

According to our database1, Koji Hosono authored at least 11 papers between 1999 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2021

2020
A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology.
IEEE J. Solid State Circuits, 2020

2019

2018

2011
Surface Encoders for a Mosaic Scale Grating.
Int. J. Autom. Technol., 2011

2008

2007
A 56-nm CMOS 99-mm<sup>2</sup> 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput.
IEEE J. Solid State Circuits, 2007

2006
A 146-mm<sup>2</sup> 8-gb multi-level NAND flash memory with 70-nm CMOS technology.
IEEE J. Solid State Circuits, 2006


2002
A 125-mm<sup>2</sup> 1-Gb NAND flash memory with 10-MByte/s program speed.
IEEE J. Solid State Circuits, 2002

1999
A 130-mm/<sup>2</sup>, 256-Mbit NAND flash with shallow trench isolation technology.
IEEE J. Solid State Circuits, 1999


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