Akihiro Imamoto

According to our database1, Akihiro Imamoto authored at least 7 papers between 2015 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
A 29-Gb/mm<sup>2</sup> 1-Tb 3-b/Cell 3-D Flash Memory With CMOS Direct Bonded Array (CBA) Technology.
IEEE J. Solid State Circuits, January, 2026

2025

2021
A 128Gb 1-bit/Cell 96-Word-Line-Layer 3D Flash Memory to Improve the Random Read Latency With tProg = 75 μs and tR = 4 μs.
IEEE J. Solid State Circuits, 2021

2020
13.5 A 128Gb 1b/Cell 96-Word-Line-Layer 3D Flash Memory to Improve Random Read Latency with tPROG=75µs and tR=4µs.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2018

2016
A Low Power 64 Gb MLC NAND-Flash Memory in 15 nm CMOS Technology.
IEEE J. Solid State Circuits, 2016

2015


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