Milos Hrkic

According to our database, Milos Hrkic authored at least 12 papers between 2001 and 2008.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2008

Generalized Buffer Insertion.

Milos Hrkic, John Lillis

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

2006

An Approach to Placement-Coupled Logic Replication.

Milos Hrkic, John Lillis, Giancarlo Beraudo

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Techniques for improved placement-coupled logic replication.

Hosung (Leo) Kim, John Lillis, Milos Hrkic

Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30, 2006

2004

Porosity-aware buffered Steiner tree construction.

Charles J. Alpert, Gopal Gandham, Milos Hrkic, Jiang Hu, Stephen T. Quay, Cliff C. N. Sze

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Simultaneous driver sizing and buffer insertion using a delay penalty estimation technique.

Charles J. Alpert, Chris C. N. Chu, Gopal Gandham, Milos Hrkic, Jiang Hu, Chandramouli V. Kashyap, Stephen T. Quay

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

A fast algorithm for identifying good buffer insertion candidate locations.

Charles J. Alpert, Milos Hrkic, Stephen T. Quay

Proceedings of the 2004 International Symposium on Physical Design, 2004

Fast and flexible buffer trees that navigate the physical layout environment.

Charles J. Alpert, Milos Hrkic, Jiang Hu, Stephen T. Quay

Proceedings of the 41th Design Automation Conference, 2004

2003

Buffer tree synthesis with consideration of temporal locality, sink polarity requirements, solution cost, congestion, and blockages.

Milos Hrkic, John Lillis

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Porosity aware buffered steiner tree construction.

Charles J. Alpert, Gopal Gandham, Milos Hrkic, Jiang Hu, Stephen T. Quay

Proceedings of the 2003 International Symposium on Physical Design, 2003

2002

Buffer tree synthesis with consideration of temporal locality, sink polarity requirements, solution cost and blockages.

Milos Hrkic, John Lillis

Proceedings of 2002 International Symposium on Physical Design, 2002

S-Tree: a technique for buffered routing tree synthesis.

Milos Hrkic, John Lillis

Proceedings of the 39th Design Automation Conference, 2002

2001

Buffered Steiner trees for difficult instances.

Charles J. Alpert, Milos Hrkic, Jiang Hu, Andrew B. Kahng, John Lillis, Bao Liu, Stephen T. Quay, Sachin S. Sapatnekar, A. J. Sullivan, Paul Villarrubia

Proceedings of the 2001 International Symposium on Physical Design, 2001