Paul G. Villarrubia

According to our database, Paul G. Villarrubia authored at least 30 papers between 1989 and 2011.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2011

Robust partitioning for hardware-accelerated functional verification.

Michael D. Moffitt, Mátyás A. Sustik, Paul G. Villarrubia

Proceedings of the 48th Design Automation Conference, 2011

2008

Placement.

Gi-Joon Nam, Paul G. Villarrubia

Proceedings of the Handbook of Algorithms for Physical Design Automation., 2008

Fast interconnect synthesis with layer assignment.

Zhuo Li, Charles J. Alpert, Shiyan Hu, Tuhin Muhmud, Stephen T. Quay, Paul G. Villarrubia

Proceedings of the 2008 International Symposium on Physical Design, 2008

Challenges at 45nm and beyond.

Dan Bailey, Eric Soenen, Puneet Gupta, Paul G. Villarrubia, Sang H. Dhong

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

2007

Diffusion-Based Placement Migration With Application on Legalization.

Haoxing Ren, David Z. Pan, Charles J. Alpert, Paul G. Villarrubia, Gi-Joon Nam

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Techniques for Fast Physical Synthesis.

Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz

Proc. IEEE, 2007

The nuts and bolts of physical synthesis.

Charles J. Alpert, Shrirang K. Karandikar, Zhuo Li, Gi-Joon Nam, Stephen T. Quay, Haoxing Ren, Cliff C. N. Sze, Paul G. Villarrubia, Mehmet Can Yildiz

Proceedings of the Ninth International Workshop on System-Level Interconnect Prediction (SLIP 2007), 2007

The coming of age of physical synthesis.

Charles J. Alpert, Chris C. N. Chu, Paul G. Villarrubia

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

RQL: Global Placement via Relaxed Quadratic Spreading and Linearization.

Natarajan Viswanathan, Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Haoxing Ren, Chris C. N. Chu

Proceedings of the 44th Design Automation Conference, 2007

Hippocrates: First-Do-No-Harm Detailed Placement.

Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

Fast Electrical Correction Using Resizing and Buffering.

Shrirang K. Karandikar, Charles J. Alpert, Mehmet Can Yildiz, Paul Villarrubia, Stephen T. Quay, T. Mahmud

Proceedings of the 12th Conference on Asia South Pacific Design Automation, 2007

ISPD 2005/2006 Placement Benchmarks.

Gi-Joon Nam, Charles J. Alpert, Paul G. Villarrubia

Proceedings of the Modern Circuit Placement, Best Practices and Results, 2007

2006

A Fast Hierarchical Quadratic Placement Algorithm.

Gi-Joon Nam, Sherief Reda, Charles J. Alpert, Paul Villarrubia, Andrew B. Kahng

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

On whitespace and stability in physical synthesis.

Saurabh N. Adya, Igor L. Markov, Paul G. Villarrubia

Integr., 2006

2005

Physical design tools for hierarchy.

Paul Villarrubia

Proceedings of the 2005 International Symposium on Physical Design, 2005

The ISPD2005 placement contest and benchmark suite.

Gi-Joon Nam, Charles J. Alpert, Paul Villarrubia, Bruce Winter, Mehmet Can Yildiz

Proceedings of the 2005 International Symposium on Physical Design, 2005

A semi-persistent clustering technique for VLSI circuit placement.

Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, Sherief Reda, Paul Villarrubia

Proceedings of the 2005 International Symposium on Physical Design, 2005

Diffusion-based placement migration.

Haoxing Ren, David Zhigang Pan, Charles J. Alpert, Paul Villarrubia

Proceedings of the 42nd Design Automation Conference, 2005

2004

Benchmarking for large-scale placement and beyond.

Saurabh N. Adya, Mehmet Can Yildiz, Igor L. Markov, Paul Villarrubia, Phiroze N. Parakh, Patrick H. Madden

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

True crosstalk aware incremental placement with noise map.

Haoxing Ren, David Zhigang Pan, Paul Villarrubia

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

2003

Effective free space management for cut-based placement via analytical constraint generation.

Charles J. Alpert, Gi-Joon Nam, Paul G. Villarrubia

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

A practical methodology for early buffer and wire resource allocation.

Charles J. Alpert, Jiang Hu, Sachin S. Sapatnekar, Paul Villarrubia

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

Important placement considerations for modern VLSI chips.

Paul Villarrubia

Proceedings of the 2003 International Symposium on Physical Design, 2003

On Whitespace and Stability in Mixed-Size Placement and Physical Synthesis.

Saurabh N. Adya, Igor L. Markov, Paul Villarrubia

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002

Free space management for cut-based placement.

Charles J. Alpert, Gi-Joon Nam, Paul Villarrubia

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001

Buffered Steiner trees for difficult instances.

Charles J. Alpert, Milos Hrkic, Jiang Hu, Andrew B. Kahng, John Lillis, Bao Liu, Stephen T. Quay, Sachin S. Sapatnekar, A. J. Sullivan, Paul Villarrubia

Proceedings of the 2001 International Symposium on Physical Design, 2001

2000

Transformational Placement and Synthesis.

Wilm E. Donath, Prabhakar Kudva, Leon Stok, Paul Villarrubia, Lakshmi N. Reddy, Andrew Sullivan, Kanad Chakraborty

Proceedings of the 2000 Design, 2000

"Timing closure by design, " a high frequency microprocessor design methodology.

Stephen D. Posluszny, Naoaki Aoki, David Boerstler, Paula K. Coulman, Sang H. Dhong, Brian K. Flachs, H. Peter Hofstee, Nobuo Kojima, Ohsang Kwon, Kyung T. Lee, David Meltzer, Kevin J. Nowka, J. Park, J. Peter, Joel Silberman, Osamu Takahashi, Paul Villarrubia

Proceedings of the 37th Conference on Design Automation, 2000

1997

An Integrated Placement and Synthesis Approach for Timing Closure of PowerPC Microprocessors.

Shervin Hojat, Paul Villarrubia

Proceedings of the Proceedings 1997 International Conference on Computer Design: VLSI in Computers & Processors, 1997

1989

IBM RISC chip design methodology.

Paul Villarrubia, Gary Nusbaum, Robert Masleid, P. T. Patel

Proceedings of the Computer Design: VLSI in Computers and Processors, 1989