Mohammad Mirza-Aghatabar

According to our database1, Mohammad Mirza-Aghatabar authored at least 12 papers between 2007 and 2012.

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Bibliography

2012
A design flow to maximize yield/area of physical devices via redundancy.
Proceedings of the 2012 IEEE International Test Conference, 2012

Theory of redundancy for logic circuits to maximize yield/area.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

2010
Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules.
Proceedings of the Design, Automation and Test in Europe, 2010

HYPER: A Heuristic for Yield/Area imProvEment Using Redundancy in SoC.
Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009
SIRUP: Switch Insertion in RedUndant Pipeline Structures for Yield and Yield/Area Improvement.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008
High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Energy analysis of re-injection based deadlock recovery routing algorithms.
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2008

Reimbursing the Handshake Overhead of Asynchronous Circuits using Compiler Pre-Synthesis Optimizations.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Introduction of Novel Rule Based Algorithms for Scheduling in Grid Computing Systems.
Proceedings of the Second Asia International Conference on Modelling and Simulation, 2008

An Adaptive Software-Based Deadlock Recovery Technique.
Proceedings of the 22nd International Conference on Advanced Information Networking and Applications, 2008

An Adaptive Approach to Manage the Number of Virtual Channels.
Proceedings of the 22nd International Conference on Advanced Information Networking and Applications, 2008

2007
An Empirical Investigation of Mesh and Torus NoC Topologies Under Different Routing Algorithms and Traffic Models.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007


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