Mehrdad Najibi

According to our database1, Mehrdad Najibi authored at least 23 papers between 2005 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Integrated Fanout Optimization and Slack Matching of Asynchronous Circuits.
Proceedings of the 20th IEEE International Symposium on Asynchronous Circuits and Systems, 2014

2013
Slack matching mode-based asynchronous circuits for average-case performance.
Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

Deriving Performance Bounds for Conditional Asynchronous Circuits Using Linear Programing.
Proceedings of the 19th IEEE International Symposium on Asynchronous Circuits and Systems, 2013

2012
Performance Bounds of Asynchronous Circuits with Mode-Based Conditional Behavior.
Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011
Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs.
IEEE Trans. Very Large Scale Integr. Syst., 2011

2009
An EDA tool for implementation of low power and secure crypto-chips.
Comput. Electr. Eng., 2009

2008
Automatic Generation of Globally Asynchronous Locally Synchronous Wrapper Circuits.
Int. J. Comput. Their Appl., 2008

Compensating Algorithmic-Loop Performance Degradation in Asynchronous Circuits Using Hardware Multi-threading.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

Reimbursing the Handshake Overhead of Asynchronous Circuits using Compiler Pre-Synthesis Optimizations.
Proceedings of the 11th Euromicro Conference on Digital System Design: Architectures, 2008

Pre-synthesis Optimization for Asynchronous Circuits Using Compiler Techniques.
Proceedings of the Advances in Computer Science and Engineering, 2008

Performance Enhancement of Asynchronous Circuits.
Proceedings of the Advances in Computer Science and Engineering, 2008

Evaluating the Metro-on-Chip Methodology to Improve the Congestion and Routability.
Proceedings of the Advances in Computer Science and Engineering, 2008

2007
A Fast and Accurate Power Estimation Methodology for QDI Asynchronous Circuits.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2007

A Power Estimation Methodology for QDI Asynchronous Circuits based on High-Level Simulation.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Performance Evaluation of Asynchronous Circuits with Choice Using Abstract Probabilistic Timed Petri Nets.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

Using standard asic back-end for qdi asynchronous circuits: dealing with isochronic fork constraint.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

An asynchronous fpga logic cell implementation.
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, 2007

2006
Globally Asynchronous Locally Synchronous Wrapper Circuit based on Clock Gating.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006

High-Level Optimization of Asynchronous Systems Utilizing Conditional Restructuring.
Proceedings of the International Symposium on System-on-Chip, 2006

Dynamic voltage and frequency management based on variable update intervals for frequency setting.
Proceedings of the 2006 International Conference on Computer-Aided Design, 2006

2005
Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs.
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005

A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005

Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only).
Proceedings of the ACM/SIGDA 13th International Symposium on Field Programmable Gate Arrays, 2005


  Loading...