N. V. Arvind

According to our database1, N. V. Arvind authored at least 10 papers between 2001 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2014
Asymmetric Aging: Introduction and Solution for Power-Managed Mixed-Signal SoCs.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2009
An Approach to Measure the Performance Impact of Dynamic Voltage Fluctuations Using Static Timing Analysis.
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

2008
Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations.
Proceedings of the 21st International Conference on VLSI Design (VLSI Design 2008), 2008

Within-die gate delay variability measurement using re-configurable ring oscillator.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2006
A Comprehensive Solution for True Hierarchical Timing and Crosstalk Delay Signoff.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2004
Improved Approach for Noise Propagation to Identify Functional Noise Violations.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Path Based Approach for Crosstalk Delay Analysis.
Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

2003
A Case Study of IR-Drop in Structured At-Speed Testing.
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Architecting ASIC libraries and flows in nanometer era.
Proceedings of the 40th Design Automation Conference, 2003

2001
Integrated Crosstalk And Oxide Integrity Analysis In Dsm Designs.
Proceedings of the 14th International Conference on VLSI Design (VLSI Design 2001), 2001


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