Nam-Jong Kim

According to our database, Nam-Jong Kim authored at least 4 papers between 1997 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

A Duo-Binary Transceiver With Time-Based Receiver and Voltage-Mode Time-Interleaved Mixing Transmitter for DRAM Interface.

Min-Kyun Chae, Hye-Jung Kwon, Seung-Jun Bae, Nam-Jong Kim, Hong-June Park

IEEE Trans. Circuits Syst. II Express Briefs, 2021

1999

A 2.5-V, 333-Mb/s/pin, 1-Gbit, double-data-rate synchronous DRAM.

Hongil Yoon, Gi-Won Cha, Changsik Yoo, Nam-Jong Kim, Keum-Yong Kim, Chang Ho Lee, Kyu-Nam Lim, Kyuchan Lee, Jun-Young Jeon, Tae Sung Jung, Hongsik Jeong, Tae-Young Chung, Kinam Kim, Soo-In Cho

IEEE J. Solid State Circuits, 1999

1998

A 1 Gbit synchronous dynamic random access memory with an independent subarray-controlled scheme and a hierarchical decoding scheme.

Kyu-Chan Lee, Changhyun Kim, Hongil Yoon, Keum-Yong Kim, Byung-Sik Moon, Sang-Bo Lee, Jung-Hwa Lee, Nam-Jong Kim, Soo-In Cho

IEEE J. Solid State Circuits, 1998

1997

Low-voltage, high-speed circuit designs for gigabit DRAMs.

Kyu-Chan Lee, Changhyun Kim, Dong-Ryul Ryu, Jai-Hoon Sim, Sang-Bo Lee, Byung-Sik Moon, Keum-Yong Kim, Nam-Jong Kim, Seung-Moon Yoo, Hongil Yoon, Jei-Hwan Yoo, Soo-In Cho

IEEE J. Solid State Circuits, 1997