Seung-Moon Yoo

According to our database¹, Seung-Moon Yoo authored at least 20 papers between 1996 and 2012.

Collaborative distances:

Dijkstra number² of three.
Erdős number³ of three.

Timeline

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In proceedings

Article

PhD thesis

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On csauthors.net:

Bibliography

2012

FlexRAM: Toward an advanced Intelligent Memory system.

[BibT_eX]

[DOI]

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

2004

Requirement-based design methods for adaptive communications links.

[BibT_eX]

[DOI]

Juan Antonio Carballo

Proceedings of the 41th Design Automation Conference, 2004

2003

A semi-custom voltage-island technique and its application to high-speed serial links.

[BibT_eX]

[DOI]

Juan Antonio Carballo

Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003

2001

Design of Energy Efficient SOC With PIM Architecture and Deep Submicron Circuit Techniques

[BibT_eX]

[DOI]

Seung-Moon Yoo

PhD thesis, 2001

The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature Management.

[BibT_eX]

[DOI]

J. Instr. Level Parallelism, 2001

L1 data cache decomposition for energy efficiency.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

New current-mode sense amplifiers for high density DRAM and PIM architectures.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Low cost and high efficiency BIST scheme with 2-level LFSR and ATPT.

[BibT_eX]

[DOI]

Seung-Moon Yoo

Seong-Ook Jung

Sung-Mo Kang

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Skew-tolerant high-speed (STHS) domino logic.

[BibT_eX]

[DOI]

Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2-level LFSR scheme with asynchronous test pattern transfer for low cost and high efficiency build-in-self-test.

[BibT_eX]

[DOI]

Seung-Moon Yoo

Seong-Ook Jung

Sung-Mo Kang

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

Effective algorithms for cache-level compression.

[BibT_eX]

[DOI]

Edward Ahn

Seung-Moon Yoo

Sung-Mo Kang

Proceedings of the 11th ACM Great Lakes Symposium on VLSI 2001, 2001

2000

A framework for dynamic energy efficiency and temperature management.

[BibT_eX]

[DOI]

Proceedings of the 33rd Annual IEEE/ACM International Symposium on Microarchitecture, 2000

New high performance sub-1 V circuit technique with reduced standby current and robust data holding.

[BibT_eX]

[DOI]

Seung-Moon Yoo

Sung-Mo Kang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips.

[BibT_eX]

[DOI]

Proceedings of the Intelligent Memory Systems, Second International Workshop, 2000

1999

CMOS Pass-gate No-race Charge-recycling Logic (CPNCL).

[BibT_eX]

[DOI]

Seung-Moon Yoo

Sung-Mo Kang

Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

No-Race Charge-Recycling Differential Logic (NCDL).

[BibT_eX]

[DOI]

Seung-Moon Yoo

Sung-Mo Kang

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

NMOS Energy Recovery Logic.

[BibT_eX]

[DOI]

Chulwoo Kim

Seung-Moon Yoo

Sung-Mo Kang

Proceedings of the 9th Great Lakes Symposium on VLSI (GLS-VLSI '99), 1999

1998

A Bootstrapped NMOS Charge Recovery Logic.

[BibT_eX]

[DOI]

Seung-Moon Yoo

Seung-Moon Kang

Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1997

Low-voltage, high-speed circuit designs for gigabit DRAMs.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1997

1996

A 32-bank 1 Gb self-strobing synchronous DRAM with 1 GByte/s bandwidth.

[BibT_eX]

[DOI]

IEEE J. Solid State Circuits, 1996

Seung-Moon Yoo

Timeline

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On csauthors.net:

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