Neel Gala

Orcid: 0000-0001-8611-6511

According to our database1, Neel Gala authored at least 15 papers between 2014 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2021
PERI: A Configurable Posit Enabled RISC-V Core.
ACM Trans. Archit. Code Optim., 2021

2020
Sparsity-Aware Caches to Accelerate Deep Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
PERI: A Posit Enabled RISC-V Core.
CoRR, 2019

2018
An Accuracy Tunable Non-Boolean Co-Processor Using Coupled Nano-Oscillators.
ACM J. Emerg. Technol. Comput. Syst., 2018

2017
Approximate Error Detection With Stochastic Checkers.
IEEE Trans. Very Large Scale Integr. Syst., 2017

A Programmable Event-driven Architecture for Evaluating Spiking Neural Networks.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017

Shakti-T: A RISC-V Processor with Light Weight Security Extensions.
Proceedings of the Hardware and Architectural Support for Security and Privacy, 2017

ELENA: A low-cost portable electronic nose for alcohol characterization.
Proceedings of the 2017 IEEE SENSORS, Glasgow, United Kingdom, October 29, 2017

2016
SHAKTI Processors: An Open-Source Hardware Initiative.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

ChADD: An ADD Based Chisel Compiler with Reduced Syntactic Variance.
Proceedings of the 29th International Conference on VLSI Design and 15th International Conference on Embedded Systems, 2016

STOCK: Stochastic Checkers for Low-overhead Approximate Error Detection.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

2015
Best is the Enemy of Good: Design Techniques for Low Power Tunable Approximate Application Specific Integrated Chips Targeting Media-Based Applications.
J. Low Power Electron., 2015

SHAKTI-F: A Fault Tolerant Microprocessor Architecture.
Proceedings of the 24th IEEE Asian Test Symposium, 2015

2014
ProCA: Progressive Configuration Aware Design Methodology for Low Power Stochastic ASICs.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

CAERUS: an effective arbitration and ejection policy for routing in an unidirectional torus.
Proceedings of the 8th International Workshop on Interconnection Network Architecture, 2014


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