Nobuaki Ozaki

According to our database, Nobuaki Ozaki authored at least 9 papers between 2011 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2015

A Co-Processor Design for an Energy Efficient Reconfigurable Accelerator CMA.

Mai Izawa, Nobuaki Ozaki, Yusuke Koizumi, Rie Uno, Hideharu Amano

Int. J. Netw. Comput., 2015

2013

A speculative gather system for Cool Mega-Array.

Rie Uno, Nobuaki Ozaki, Mai Izawa, Akihito Tsusaka, Takaaki Miyajima, Hideharu Amano

Proceedings of the 2013 International Conference on Field-Programmable Technology, 2013

Research of PE Array Connection Network for Cool Mega-Array.

Rie Uno, Nobuaki Ozaki, Hideharu Amano

Proceedings of the 27th International Conference on Advanced Information Networking and Applications Workshops, 2013

2012

Removing Context Memory from a Multi-context Dynamically Reconfigurable Processor.

Hideharu Amano, Masayuki Kimura, Nobuaki Ozaki

Proceedings of the IEEE 6th International Symposium on Embedded Multicore/Manycore SoCs, 2012

CMA-2 : The second prototype of a low power reconfigurable accelerator.

Mai Izawa, Nobuaki Ozaki, Yoshihiro Yasuda, Masayuki Kimura

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips.

Nobuaki Ozaki, Yoshihiro Yasuda, Mai Izawa, Yoshiki Saito, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

IEEE Micro, 2011

Cool Mega-Array: A highly energy efficient reconfigurable accelerator.

Nobuaki Ozaki, Yoshihiro Yasuda, Yoshiki Saito, Daisuke Ikebuchi, Masayuki Kimura, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

The realtime image processing demonstration with CMA-1: An ultra low-power reconfigurable accelerator.

Kazuei Hironaka, Nobuaki Ozaki, Hideharu Amano

Proceedings of the 2011 International Conference on Field-Programmable Technology, 2011

SLD-1(Silent Large Datapath): A ultra low power reconfigurable accelerator.

Nobuaki Ozaki, Kimiyoshi Usami, Hideharu Amano, Mitaro Namiki, Hiroshi Nakamura, Masaaki Kondo

Proceedings of the 2011 IEEE Symposium on Low-Power and High-Speed Chips, 2011