Oriol Arcas-Abella

Orcid: 0000-0001-8578-0285

Affiliations:
  • Barcelona Supercomputing Center (BSC), Barcelona, Spain
  • Polytechnic University of Catalonia (UPC), Barcelona, Spain


According to our database1, Oriol Arcas-Abella authored at least 16 papers between 2011 and 2020.

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Bibliography

2020
Architectural Analysis of FPGA Technology Impact.
CoRR, 2020

SABES: Statistical Available Bandwidth EStimation from passive TCP measurements.
Proceedings of the 2020 IFIP Networking Conference, 2020

2019
Improving TCP Performance and Reducing Self-Induced Congestion with Receive Window Modulation.
Proceedings of the 28th International Conference on Computer Communication and Networks, 2019

2017
AxleDB: A novel programmable query processing platform on FPGA.
Microprocess. Microsystems, 2017

2016
Multicore architecture prototyping on reconfigurable devices.
PhD thesis, 2016

Hardware Acceleration for Query Processing: Leveraging FPGAs, CPUs, and Memory.
Comput. Sci. Eng., 2016

Accelerating Hash-Based Query Processing Operations on FPGAs by a Hash Table Caching Technique.
Proceedings of the High Performance Computing - Third Latin American Conference, 2016

Bluespec SystemVerilog.
Proceedings of the FPGAs for Software Programmers, 2016

2015
HATCH: Hash Table Caching in Hardware for Efficient Relational Join on FPGA.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

High-Level Debugging and Verification for FPGA-Based Multicore Architectures.
Proceedings of the 23rd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2015

2014
An empirical evaluation of High-Level Synthesis languages and tools for database acceleration.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2013
Generating infrastructure for FPGA-accelerated applications.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

2012
Resource-bounded multicore emulation using Beefarm.
Microprocess. Microsystems, 2012

A Low-Overhead Profiling and Visualization Framework for Hybrid Transactional Memory.
Proceedings of the 2012 IEEE 20th Annual International Symposium on Field-Programmable Custom Computing Machines, 2012

2011
TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

From Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011


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