Paul Six

According to our database1, Paul Six authored at least 12 papers between 1986 and 1998.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1998
Techniques for Reducing the Number of Decisions and Backtracks in Combinational Test Generation.
J. Electron. Test., 1998

Efficient System Exploration and Synthesis of Applications with Dynamic Data Storage and Intensive Data Transfer.
Proceedings of the 35th Conference on Design Automation, 1998

1995
Search space reduction through clustering in test generation.
Proceedings of the Proceedings EURO-DAC'95, 1995

Timing optimization by bit-level arithmetic transformations.
Proceedings of the Proceedings EURO-DAC'95, 1995

1992
Flag/Condition Handling and Branch Assignment for Large Microcoded Controllers.
Proceedings of the Synthesis for Control Dominated Circuits, 1992

Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks.
Proceedings of the Synthesis for Control Dominated Circuits, 1992

1991
DARSI: RC data reduction [VLSI simulation].
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

1990
CGE: automatic generation of controllers in the CATHEDRAL-II silicon compiler.
Proceedings of the European Design Automation Conference, 1990

A Data Path Layout Assembler for High Performance DSP Circuits.
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando, 1990

1989
REDUSA: module generation by automatic elimination of superfluous blocks in regular structures.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1989

1986
Cathedral-II: A Silicon Compiler for Digital Signal Processing.
IEEE Des. Test, 1986

An intelligent module generator environment.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986


  Loading...