Veerle Derudder

According to our database, Veerle Derudder authored at least 18 papers between 1992 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A 16GHz, $41\text{kHz}_{\text{rms}}$ Frequency Error, Background-Calibrated, Duty-Cycled FMCW Charge-Pump PLL.

Pratap Tumkur Renukaswamy, Kristof Vaesen, Nereo Markulic, Veerle Derudder, Dae-Woong Park, Piet Wambacq, Jan Craninckx

Proceedings of the IEEE International Solid- State Circuits Conference, 2023

2021

High-Speed LDPC Decoders Towards 1 Tb/s.

Meng Li, Veerle Derudder, Kaoutar Bertrand, Claude Desset, André Bourdoux

IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020

Tb/s Polar Successive Cancellation Decoder 16nm ASIC Implementation.

Altug Süral, E. Göksu Sezer, Ertugrul Kolagasioglu, Veerle Derudder, Kaoutar Bertrand

CoRR, 2020

2018

A 100 Gbps LDPC Decoder for the IEEE 802.11ay Standard.

Meng Li, Veerle Derudder, Claude Desset, Andy Dewilde, André Bourdoux, Yanxiang Huang

Proceedings of the 10th IEEE International Symposium on Turbo Codes & Iterative Information Processing, 2018

2017

A 79-GHz 2 × 2 MIMO PMCW Radar SoC in 28-nm CMOS.

Davide Guermandi, Qixian Shi, Andy Dewilde, Veerle Derudder, Ubaid Ahmad, Annachiara Spagnolo, Ilja Ocket, André Bourdoux, Piet Wambacq, Jan Craninckx, Wim Van Thillo

IEEE J. Solid State Circuits, 2017

2016

A 79GHz 2×2 MIMO PMCW radar SoC in 28nm CMOS.

Davide Guermandi, Qixian Shi, Andy Dewilde, Veerle Derudder, Ubaid Ahmad, Annachiara Spagnolo, André Bourdoux, Piet Wambacq, Wim Van Thillo

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2016

2015

An energy efficient 18Gbps LDPC decoding processor for 802.11ad in 28nm CMOS.

Meng Li, Jan-Willem Weijers, Veerle Derudder, Ilse Vos, Maxim Rykunov, Steven Dupont, Peter Debacker, Andy Dewilde, Yanxiang Huang, Liesbet Van der Perre, Wim Van Thillo

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2007

Energy-efficient software-defined radio solutions for MIMO-based broadband communication.

Bruno Bougard, André Bourdoux, Frederik Naessens, Miguel Glassee, Veerle Derudder, Liesbet Van der Perre

Proceedings of the 15th European Signal Processing Conference, 2007

2006

From MIMO-OFDM Algorithms to a Real-Time Wireless Prototype: A Systematic Matlab-to-Hardware Design Flow.

Jan-Willem Weijers, Veerle Derudder, Sven Janssens, Frederik Petré, André Bourdoux

EURASIP J. Adv. Signal Process., 2006

Subword-Parallel VLIW Architecture Exploration for Multimode Software Defined Radio.

Thomas Schuster, D. N. Bruna, Bruno Bougard, Veerle Derudder, A. Hoffmann, Liesbet Van der Perre

Proceedings of the IEEE Workshop on Signal Processing Systems, 2006

2004

An approach for real time prototyping of MIMO-OFDM systems.

Maryse Wouters, André Bourdoux, Stefaan De Rore, Sven Janssens, Veerle Derudder

Proceedings of the 2004 12th European Signal Processing Conference, 2004

2003

Memory Power Reduction for High-Speed Implementation of Turbo Codes.

Bruno Bougard, Liesbet Van der Perre, F. Maessen, Alexandre Giulietti, Veerle Derudder, Francky Catthoor

J. VLSI Signal Process., 2003

A performance and complexity comparison of auto-correlation and cross-correlation for OFDM burst synchronization.

Andrew Fort, Jan-Willem Weijers, Veerle Derudder, Wolfgang Eberle, André Bourdoux

Proceedings of the 2003 IEEE International Conference on Acoustics, 2003

2002

A 80 Mb/s low-power scalable turbo codec core.

Alexandre Giulietti, Bruno Bougard, Veerle Derudder, Steven Dupont, Jan-Willem Weijers, Liesbet Van der Perre

Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001

80-Mb/s QPSK and 72-Mb/s 64-QAM flexible and scalable digital OFDM transceiver ASICs for wireless local area networks in the 5-GHz band.

Wolfgang Eberle, Veerle Derudder, Geert Vanwijnsberghe, Mario Vergara, Luc Deneire, Liesbet Van der Perre, Marc Engels, Ivo Bolsens, Hugo De Man

IEEE J. Solid State Circuits, 2001

1999

A new algorithm for elimination of common subexpressions.

Robert Pasko, Patrick Schaumont, Veerle Derudder, Serge Vernalde, Daniela Duracková

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999

1997

Optimization Method for Broadband Modem FIR Filter Design using Common Subexpression Elimination.

Robert Pasko, Patrick Schaumont, Veerle Derudder, Daniela Duracková

Proceedings of the 10th International Symposium on System Synthesis, 1997

1992

Regular Module Generation or Standard Cells: Two Alternative Implementations of a Library of Functional Building Blocks.

Evagelos Katsadas, Zohair Sahraoui, Maryse Wouters, Veerle Derudder, Ivo Bolsens, Paul Six, Hugo De Man

Proceedings of the Synthesis for Control Dominated Circuits, 1992