Jan M. Rabaey

According to our database1, Jan M. Rabaey authored at least 258 papers between 1985 and 2019.

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Awards

IEEE Fellow

IEEE Fellow 1995, "For contributions in design synthesis and concurrent architectures for signal processing applications.".

Timeline

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Bibliography

2019
A 200-Mb/s Energy Efficient Transcranial Transmitter Using Inductive Coupling.
IEEE Trans. Biomed. Circuits and Systems, 2019

Efficient Biosignal Processing Using Hyperdimensional Computing: Network Templates for Combined Learning and Classification of ExG Signals.
Proceedings of the IEEE, 2019

Towards Wireless Flexible Printed Wearable Sensors.
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019

Towards Wireless Flexible Printed Wearable Sensors.
Proceedings of the IEEE 8th International Workshop on Advances in Sensors and Interfaces, 2019

Feasability of On-Body Backscattering in the UHF-RFID Band using Screen-Printed Dipole Antennas.
Proceedings of the 13th International Symposium on Medical Information and Communication Technology, 2019

2018
Classification and Recall With Binary Hyperdimensional Computing: Tradeoffs in Choice of Density and Mapping Characteristics.
IEEE Trans. Neural Netw. Learning Syst., 2018

Automatic 3D Design for Efficiency Optimization of a Class E Power Amplifier.
IEEE Trans. on Circuits and Systems, 2018

A Dual-Resolution Wavelet-Based Energy Detection Spectrum Sensing for UWB-Based Cognitive Radios.
IEEE Trans. on Circuits and Systems, 2018

A 213-nW/Channel Analog Euclidian Vector Normalizer.
IEEE Trans. on Circuits and Systems, 2018

A Comparative Study of On-Body Radio-Frequency Links in the 420 MHz-2.4 GHz Range.
Sensors, 2018

Hyperdimensional Computing Exploiting Carbon Nanotube FETs, Resistive RAM, and Their Monolithic 3D Integration.
J. Solid-State Circuits, 2018

Isolator-Less Near-Field RFID Reader for Sub-Cranial Powering/Data Link of Millimeter-Sized Implants.
J. Solid-State Circuits, 2018

A Neuro-Inspired Spike Pattern Classifier.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2018

Towards TRUE human-centric computation.
Computer Communications, 2018

Fabrication and Characterization of Flexible Spray-Coated Antennas.
IEEE Access, 2018

Homo technologicus.
Proceedings of the 2018 International Symposium on VLSI Design, 2018

Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

A 200Mb/s inductively coupled wireless transcranial transceiver achieving 5e-11 BER and 1.5pJ/b transmit energy efficiency.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

An EMG Gesture Recognition System with Flexible High-Density Sensors and Brain-Inspired High-Dimensional Classifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

2017
Guest Editorial: Alternative Computing and Machine Learning for Internet of Things.
IEEE Trans. VLSI Syst., 2017

High-Dimensional Computing as a Nanoscalable Paradigm.
IEEE Trans. on Circuits and Systems, 2017

A Bio-Inspired Analog Gas Sensing Front End.
IEEE Trans. on Circuits and Systems, 2017

Reliable Next-Generation Cortical Interfaces for Chronic Brain-Machine Interfaces and Neuroscience.
Proceedings of the IEEE, 2017

Low-Power Sparse Hyperdimensional Encoder for Language Recognition.
IEEE Design & Test, 2017

Far-Field RF Wireless Power Transfer with Blind Adaptive Beamforming for Internet of Things Devices.
IEEE Access, 2017

Design and characterization of a 65nm CMOS wireless RFID reader for ECoG tag.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017

Human-centric computing - The case for a Hyper-Dimensional approach.
Proceedings of the 7th IEEE International Workshop on Advances in Sensors and Interfaces, 2017

EE2: Intelligent machines: Will the technological singularity happen?
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

SLSR: A flexible middleware localization service architecture.
Proceedings of the 2017 International Conference on Indoor Positioning and Indoor Navigation, 2017

Selection and Aggregation of Location Information Provisioning Services.
Proceedings of the 26th International Conference on Computer Communication and Networks, 2017

Exploring Hyperdimensional Associative Memory.
Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Blind parallel interrogation of ultrasonic neural dust motes based on canonical polyadic decomposition: A simulation study.
Proceedings of the 25th European Signal Processing Conference, 2017

Isolator-less near-field RFID reader for sub-cranial powering/data link of mm-sized implants.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

A Systems Approach to Computing in Beyond CMOS Fabrics: Invited.
Proceedings of the 54th Annual Design Automation Conference, 2017

Optimized Design of a Human Intranet Network.
Proceedings of the 54th Annual Design Automation Conference, 2017

2016
A 2.4 GHz Interferer-Resilient Wake-Up Receiver Using A Dual-IF Multi-Stage N-Path Architecture.
J. Solid-State Circuits, 2016

A High Data-Rate Energy-Efficient Triple-Channel UWB-Based Cognitive Radio.
J. Solid-State Circuits, 2016

On the Total Power Capacity of Regular-LDPC Codes With Iterative Message-Passing Decoders.
IEEE Journal on Selected Areas in Communications, 2016

A Robust and Energy-Efficient Classifier Using Brain-Inspired Hyperdimensional Computing.
Proceedings of the 2016 International Symposium on Low Power Electronics and Design, 2016

Toward standardized localization service.
Proceedings of the International Conference on Indoor Positioning and Indoor Navigation, 2016

Hyperdimensional biosignal processing: A case study for EMG-based hand gesture recognition.
Proceedings of the IEEE International Conference on Rebooting Computing, 2016

Powering and communication for OMNI: A distributed and modular closed-loop neuromodulation device.
Proceedings of the 38th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2016

Sampling modulation: An energy efficient novel feature extraction for biosignal processing.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2016

2015
Swarm os control plane: an architecture proposal for heterogeneous and organic networks.
IEEE Trans. Consumer Electronics, 2015

The Human Intranet-Where Swarms and Humans Meet.
IEEE Pervasive Computing, 2015

A Minimally Invasive 64-Channel Wireless μECoG Implant.
J. Solid-State Circuits, 2015

A 4.78 mm 2 Fully-Integrated Neuromodulation SoC Combining 64 Acquisition Channels With Digital Compression and Simultaneous Dual Stimulation.
J. Solid-State Circuits, 2015

Energy-Efficient Abundant-Data Computing: The N3XT 1, 000x.
IEEE Computer, 2015

A 1Gb/s energy efficient triple-channel UWB-based cognitive radio.
Proceedings of the Symposium on VLSI Circuits, 2015

Brain-machine interfaces - The core of the human intranet.
Proceedings of the 6th International Workshop on Advances in Sensors and Interfaces, 2015

13.5 A -97dBm-sensitivity interferer-resilient 2.4GHz wake-up receiver using dual-IF multi-N-Path architecture in 65nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Swarm OS control plane: An architecture proposal for heterogeneous and organic networks.
Proceedings of the IEEE International Conference on Consumer Electronics, 2015

A 3.1-10.6GHz wavelet-based dual-resolution spectrum sensing with harmonic rejection mixers.
Proceedings of the ESSCIRC Conference 2015, 2015

Ultrasonic beamforming system for interrogating multiple implantable sensors.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

The human intranet: where swarms and humans meet.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

Operating system support for mobile robot swarms.
Proceedings of the Second International Workshop on the Swarm at the Edge of the Cloud, 2015

Semantic swarm.
Proceedings of the Second International Workshop on the Swarm at the Edge of the Cloud, 2015

2014
Novel Class of Energy-Efficient Very High-Speed Conditional Push-Pull Pulsed Latches.
IEEE Trans. VLSI Syst., 2014

RFID transceiver for wireless powering brain implanted microelectrodes and backscattered neural data collection.
Microelectronics Journal, 2014

The Swarm at the Edge of the Cloud.
IEEE Design & Test, 2014

A 4.78mm2 fully-integrated neuromodulation SoC combining 64 acquisition channels with digital compression and simultaneous dual stimulation.
Proceedings of the Symposium on VLSI Circuits, 2014

Impedance modeling of the intracortical microelectrode for a reliable design of a brain activity recording system.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

Beamforming approaches for untethered, ultrasonic neural dust motes for cortical recording: A simulation study.
Proceedings of the 36th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2014

2013
A 0.25 V 460 nW Asynchronous Neural Signal Processor With Inherent Leakage Suppression.
J. Solid-State Circuits, 2013

A Fully-Integrated, Miniaturized (0.125 mm2) 10.5 µW Wireless Neural Sensor.
J. Solid-State Circuits, 2013

"EChO" Reconfigurable Power Management Unit for Energy Reduction in Sleep-Active Transitions.
J. Solid-State Circuits, 2013

Physical principles for scalable neural recording.
Front. Comput. Neurosci., 2013

Wireless powering and data communication for neural implantable electrodes.
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013

The innovation is in the minds.
Proceedings of the 5th IEEE International Workshop on Advances in Sensors and Interfaces, 2013

Energy detection technique for ultra-low power high sensitivity wake-up receiver.
Proceedings of the 2013 IEEE International Symposium on Circuits and Systems (ISCAS2013), 2013

Data communication and power system for wireless neural recording.
Proceedings of 2013 IEEE 18th Conference on Emerging Technologies & Factory Automation, 2013

Equalization for intracortical microstimulation artifact reduction.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

Panel: the heritage of Mead & Conway: what has remained the same, what was missed, what has changed, what lies ahead.
Proceedings of the Design, Automation and Test in Europe, 2013

Wearable and Implantable Antennas for Wireless Body-Centric Sensing Systems.
Proceedings of the 8th International Conference on Body Area Networks, 2013

2012
A 0.013 mm2, 5 µW , DC-Coupled Neural Signal Acquisition IC With 0.5 V Supply.
J. Solid-State Circuits, 2012

A Fully Integrated, 290 pJ/bit UWB Dual-Mode Transceiver for cm-Range Wireless Interconnects.
J. Solid-State Circuits, 2012

A fully-integrated 10.5µW miniaturized (0.125mm2) wireless neural sensor.
Proceedings of the Symposium on VLSI Circuits, 2012

An 8-PPM, 45 pJ/bit UWB transmitter with reduced number of PA elements.
Proceedings of the Symposium on VLSI Circuits, 2012

A 0.25V 460nW asynchronous neural signal processor with inherent leakage suppression.
Proceedings of the Symposium on VLSI Circuits, 2012

Conditional push-pull pulsed latches with 726fJ·ps energy-delay product in 65nm CMOS.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

Choosing "green" codes by simulation-based modeling of implementations.
Proceedings of the 2012 IEEE Global Communications Conference, 2012

Active RFID: Perpetual wireless communications platform for sensors.
Proceedings of the 38th European Solid-State Circuit conference, 2012

A CMOS switched-capacitor fractional bandgap reference.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

EChO power management unit with reconfigurable switched-capacitor converter in 65 nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

Statistical Analysis and Optimization of Asynchronous Digital Circuits.
Proceedings of the 18th IEEE International Symposium on Asynchronous Circuits and Systems, 2012

2011
An information-theoretic framework for joint architectural and circuit level optimization for olfactory recognition processing.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

The power cost of over-designing codes.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2011

"Green codes with short wires at the decoder: Fundamental limits and constructions".
Proceedings of the Information Theory and Applications Workshop, 2011

Beyond the horizon: The next 10x reduction in power - Challenges and solutions.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A 0.013mm2 5μW DC-coupled neural signal acquisition IC with 0.5V supply.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

Digital energy detection for OOK demodulation in ultra-low power radios.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Linearity analysis of CMOS passive mixer.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A low-leakage parallel CRC generator for ultra-low power applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Brain-machine interfaces as the new frontier in extreme miniaturization.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

Powering and communicating with mm-size implants.
Proceedings of the Design, Automation and Test in Europe, 2011

Information theory meets circuit design: Why capacity-approaching codes require more chip area and power.
Proceedings of the 49th Annual Allerton Conference on Communication, 2011

2010
Ultra-Low Power Signal Processing [DSP Forum].
IEEE Signal Process. Mag., 2010

Ultralow-Power Design in Near-Threshold Region.
Proceedings of the IEEE, 2010

A 2.2mW CMOS LNA for 6-8.5GHz UWB receivers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

Always energy-optimal microscopic wireless systems.
Proceedings of the Design, Automation and Test in Europe, 2010

EDA challenges and options: investing for the future.
Proceedings of the 47th Design Automation Conference, 2010

2009
Low Power Design Essentials
Series on Integrated Circuits and Systems, Springer, ISBN: 978-0-387-71713-5, 2009

A 52 µW Wake-Up Receiver With -72 dBm Sensitivity Using an Uncertain-IF Architecture.
J. Solid-State Circuits, 2009

SRAM supply voltage scaling: A reliability perspective.
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009

A 13.2 mW 1.9 GHz Interpolative BAW-based VCO for Miniaturized RF Frequency Synthesis.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2009), 2009

EDA in flux: should I stay or should I go?
Proceedings of the 46th Design Automation Conference, 2009

Technologies for an Autonomous Wireless Home Healthcare System.
Proceedings of the Sixth International Workshop on Wearable and Implantable Body Sensor Networks, 2009

2008
The Search for Alternative Computational Paradigms.
IEEE Design & Test of Computers, 2008

Challenges and Solutions for Late- and Post-Silicon Design.
IEEE Design & Test of Computers, 2008

Workloads of the Future.
IEEE Design & Test of Computers, 2008

Analysis of Interference Effects in MB-OFDM UWB Systems.
Proceedings of the WCNC 2008, IEEE Wireless Communications & Networking Conference, March 31 2008, 2008

Multi-mode sub-Nyquist rate digital-to-analog conversion for direct waveform synthesis.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2008

Computing at the Crossroads (And What Does it Mean to Verification and Test?).
Proceedings of the 2008 IEEE International Test Conference, 2008

A 2GHz 52 μW Wake-Up Receiver with -72dBm Sensitivity Using Uncertain-IF Architecture.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

Error-Tolerant SRAM Design for Ultra-Low Power Standby Operation.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Fundamental Data Retention Limits in SRAM Standby Experimental Results.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

More Moore: foolish, feasible, or fundamentally different?
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Next generation wireless-multimedia devices: who is up for the challenge?
Proceedings of the 45th Design Automation Conference, 2008

PicoCube: a 1 cm3 sensor node powered by harvested energy.
Proceedings of the 45th Design Automation Conference, 2008

Asynchronous Computing in Sense Amplifier-Based Pass Transistor Logic.
Proceedings of the 14th IEEE International Symposium on Asynchronous Circuits and Systems, 2008

A brand new wireless day.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007
Low-Power Successive Approximation Converter With 0.5 V Supply in 90 nm CMOS.
J. Solid-State Circuits, 2007

Exploring Very Low-Energy Logic: A Case Study.
J. Low Power Electronics, 2007

Modelling and simulation techniques for highly integrated, low-power wireless sensor networks.
IET Computers & Digital Techniques, 2007

Beyond Sensor Networks: ZUMA Middleware.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2007

Multi-Dimensional Circuit and Micro-Architecture Level Optimization.
Proceedings of the 8th International Symposium on Quality of Electronic Design (ISQED 2007), 2007

Fundamental Bounds on Power Reduction during Data-Retention in Standby SRAM.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

Fundamental Redundancy Versus Power Trade-Off in Standby SRAM.
Proceedings of the IEEE International Conference on Acoustics, 2007

Short Distance Wireless, Dense Networks, and Their Opportunities.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Design Without Borders.
Proceedings of the Tenth Euromicro Conference on Digital System Design: Architectures, 2007

Design without Borders - A Tribute to the Legacy of A. Richard Newton.
Proceedings of the 44th Design Automation Conference, 2007

An Ultra-Low-Power Power Management IC for Wireless Sensor Nodes.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

A 65 μW, 1.9 GHz RF to digital baseband wakeup receiver for wireless sensor nodes.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
A Scalable Configurable Architecture for Advanced Wireless Communication Algorithms.
VLSI Signal Processing, 2006

Overcoming untuned radios in wireless networks with network coding.
IEEE Trans. Information Theory, 2006

L. Embedding Mixed-Signal Design in Systems-on-Chip.
Proceedings of the IEEE, 2006

SRAM Cell Optimization for Ultra-Low Power Standby.
J. Low Power Electronics, 2006

The Energy-per-Useful-Bit Metric for Evaluating and Optimizing Sensor Network Physical Layers.
Proceedings of the Third Annual IEEE Communications Society Conference on Sensor, 2006

An RF ToF Based Ranging Implementation for Sensor Networks.
Proceedings of IEEE International Conference on Communications, 2006

Is "Network" the next "Big Idea" in design?
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2005
Improving power output for vibration-based energy scavengers.
IEEE Pervasive Computing, 2005

Standby supply voltage minimization for deep sub-micron SRAM.
Microelectronics Journal, 2005

Modeling and Analysis of Opportunistic Routing in Low Traffic Scenarios.
Proceedings of the 3rd International Symposium on Modeling and Optimization in Mobile, 2005

Does proper coding make single hop wireless sensor networks reality: the power consumption perspective.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2005

Low power synchronization for wireless sensor network modems.
Proceedings of the IEEE Wireless Communications and Networking Conference, 2005

When Does Opportunistic Routing Make Sense?
Proceedings of the 3rd IEEE Conference on Pervasive Computing and Communications Workshops (PerCom 2005 Workshops), 2005

Traveling the Wild Frontier of Ultra Low-Power Design.
Proceedings of the Integrated Circuit and System Design, 2005

Modeling Within-Die Spatial Correlation Effects for Process-Design Co-Optimization.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

On the performance of geographical routing in the presence of localization errors [ad hoc network applications].
Proceedings of IEEE International Conference on Communications, 2005

Receiver initiated rendezvous schemes for sensor networks.
Proceedings of the Global Telecommunications Conference, 2005. GLOBECOM '05, St. Louis, Missouri, USA, 28 November, 2005

Wireless platforms: GOPS for cents and MilliWatts.
Proceedings of the 42nd Design Automation Conference, 2005

A low-power mixed-signal baseband system design for wireless sensor networks.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

An ultra-low power injection locked transmitter for wireless sensor networks.
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

Design at the end of the silicon roadmap.
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

Are we ready for system-level synthesis?
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004
Ultra Low Power CORDIC Processor for Wireless Communication Algorithms.
VLSI Signal Processing, 2004

A study of energy consumption and reliability in a multi-hop sensor network.
Mobile Computing and Communications Review, 2004

An Integrated, Low Power Localization System for Sensor Networks.
Proceedings of the 1st Annual International Conference on Mobile and Ubiquitous Systems (MobiQuitous 2004), 2004

SRAM Leakage Suppression by Minimizing Standby Supply Voltage.
Proceedings of the 5th International Symposium on Quality of Electronic Design (ISQED 2004), 2004

A class A/B low power amplifier for wireless sensor networks.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

An integrated data-link energy model for wireless sensor networks.
Proceedings of IEEE International Conference on Communications, 2004

Power-efficient rendez-vous schemes for dense wireless sensor networks.
Proceedings of IEEE International Conference on Communications, 2004

Adaptive sleep discipline for energy conservation and robustness in dense sensor networks.
Proceedings of IEEE International Conference on Communications, 2004

Power Sources for Wireless Sensor Networks.
Proceedings of the Wireless Sensor Networks, First European Workshop, 2004

2003
A study of low level vibrations as a power source for wireless sensor nodes.
Computer Communications, 2003

Lightweight time synchronization for sensor networks.
Proceedings of the Second ACM International Conference on Wireless Sensor Networks and Applications, 2003

Distributed algorithms for transmission power control in wireless sensor networks.
Proceedings of the 2003 IEEE Wireless Communications and Networking, 2003

Massively Parallel Wireless Reconfigurable Processor Architecture and Programming.
Proceedings of the 17th International Parallel and Distributed Processing Symposium (IPDPS 2003), 2003

Reshaping EDA for power.
Proceedings of the 40th Design Automation Conference, 2003

A low-energy chip-set for wireless intercom.
Proceedings of the 40th Design Automation Conference, 2003

UML and Platform-based Design.
Proceedings of the UML for Real - Design of Embedded Real-Time Systems, 2003

2002
Energy aware routing for low energy ad hoc sensor networks.
Proceedings of the 2002 IEEE Wireless Communications and Networking Conference Record, 2002

Robust Positioning Algorithms for Distributed Ad-Hoc Wireless Sensor Networks.
Proceedings of the General Track: 2002 USENIX Annual Technical Conference, 2002

What's the next EDA driver?
Proceedings of the 39th Design Automation Conference, 2002

2001
Design Methodology of a Low-Energy Reconfigurable Single-Chip DSP System.
VLSI Signal Processing, 2001

Wireless beyond the third generation wireless beyond the third generation: facing the energy challenge.
Proceedings of the 2001 International Symposium on Low Power Electronics and Design, 2001

Reconfigurable platform design for wireless protocol processors.
Proceedings of the IEEE International Conference on Acoustics, 2001

Location in distributed ad-hoc wireless sensor networks.
Proceedings of the IEEE International Conference on Acoustics, 2001

Low power distributed MAC for ad hoc sensor radio networks.
Proceedings of the Global Telecommunications Conference, 2001

Design methodology for PicoRadio networks.
Proceedings of the Conference on Design, Automation and Test in Europe, 2001

Addressing the System-on-a-Chip Interconnect Woes Through Communication-Based Design.
Proceedings of the 38th Design Automation Conference, 2001

2000
Low-swing on-chip signaling techniques: effectiveness and robustness.
IEEE Trans. VLSI Syst., 2000

Maximally and arbitrarily fast implementation of linear andfeedback linear computations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

System-level design: orthogonalization of concerns andplatform-based design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2000

PicoRadio Supports Ad Hoc Ultra-Low Power Wireless Networking.
IEEE Computer, 2000

MOS current mode logic for low power, low noise CORDIC computation in mixed-signal environments.
Proceedings of the 2000 International Symposium on Low Power Electronics and Design, 2000

Processors for Mobile Applications.
Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, 2000

Challenges and Opportunities in Broadband and Wireless Communication Designs.
Proceedings of the 2000 IEEE/ACM International Conference on Computer-Aided Design, 2000

Designing wireless protocols: methodology and applications.
Proceedings of the IEEE International Conference on Acoustics, 2000

Silicon Platforms for the Next Generation Wireless Systems - What Role Does Reconfigurable Hardware Play?
Proceedings of the Field-Programmable Logic and Applications, 2000

Predicting performance potential of modern DSPs.
Proceedings of the 37th Conference on Design Automation, 2000

Wireless protocols design: challenges and opportunities.
Proceedings of the Eighth International Workshop on Hardware/Software Codesign, 2000

Low-power silicon architecture for wireless communications: embedded tutorial.
Proceedings of ASP-DAC 2000, 2000

Retargetable estimation scheme for DSP architecture selection.
Proceedings of ASP-DAC 2000, 2000

1999
Algorithm selection: a quantitative optimization-intensive approach.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1999

The design of a low energy FPGA.
Proceedings of the 1999 International Symposium on Low Power Electronics and Design, 1999

1998
The Conceptual-Level Design Approach to Complex Systems.
VLSI Signal Processing, 1998

Behavioral-level synthesis of heterogeneous BISR reconfigurable ASIC's.
IEEE Trans. VLSI Syst., 1998

Invited Address: Hybrid Reconfigurable Processors - The Road to Low-Power Consumption.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

Low-swing interconnect interface circuits.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Low-energy embedded FPGA structures.
Proceedings of the 1998 International Symposium on Low Power Electronics and Design, 1998

Evaluation of a Low-Power Reconfigurable DSP Architecture.
Proceedings of the Parallel and Distributed Processing, 10 IPPS/SPDP'98 Workshops Held in Conjunction with the 12th International Parallel Processing Symposium and 9th Symposium on Parallel and Distributed Processing, Orlando, Florida, USA, March 30, 1998

An Energy-Conscious Exploration Methodology for Reconfigurable DSPs.
Proceedings of the 1998 Design, 1998

A Multiprocessor DSP System Using PADDI-2.
Proceedings of the 35th Conference on Design Automation, 1998

A Methodology for Guided Behavioral-Level Optimization.
Proceedings of the 35th Conference on Design Automation, 1998

1997
System-level power estimation and optimization - challenges and perspectives.
Proceedings of the 1997 International Symposium on Low Power Electronics and Design, 1997

Reconfigurable processing: the solution to low-power programmable DSP.
Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

A Dynamic Design Estimation and Exploration Environment.
Proceedings of the 34st Conference on Design Automation, 1997

1996
A low-power, lightweight unit to provide ubiquitous information access application and network support for InfoPad.
IEEE Personal Commun., 1996

Low-power architectural synthesis and the impact of exploiting locality.
VLSI Signal Processing, 1996

Analysis of multidimensional DSP specifications.
IEEE Trans. Signal Processing, 1996

Activity-sensitive architectural power analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

Performance optimization using template mapping for datapath-intensive high-level synthesis.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1996

An Integrated CAD Environment for Low-Power Design.
IEEE Design & Test of Computers, 1996

Which has greater potential power impact: high-level design and algorithms or innovative low power technology? (panel).
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

A Global QoS Management for Wireless Network.
Proceedings of the Mobile Communications: Technology, 1996

Exploiting regularity for low-power design.
Proceedings of the 1996 IEEE/ACM International Conference on Computer-Aided Design, 1996

Early Power Exploration - A World Wide Web Application.
Proceedings of the 33st Conference on Design Automation, 1996

1995
Synthesis for real time systems: Solutions and challenges.
VLSI Signal Processing, 1995

Guest editor's introduction design environments for DSP.
VLSI Signal Processing, 1995

Architectural power analysis: The dual bit type method.
IEEE Trans. VLSI Syst., 1995

Optimizing power using transformations.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1995

Activity-sensitive architectural power analysis for the control path.
Proceedings of the 1995 International Symposium on Low Power Design 1995, 1995

Efficient throughput optimization of feedback linear computations using generalized Horner's scheme.
Proceedings of the 1995 International Conference on Acoustics, 1995

Design guidance in the power dimension.
Proceedings of the 1995 International Conference on Acoustics, 1995

Power minimization in DSP application specific systems using algorithm selection.
Proceedings of the 1995 International Conference on Acoustics, 1995

InfoNet: the Networking Infrastructure of InfoPad.
Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995

Design of Wireless Portable Systems.
Proceedings of the COMPCON '95: Technologies for the Information Superhighway, 1995

A prototype user interface for a mobile multimedia terminal.
Proceedings of the Human Factors in Computing Systems, 1995

1994
Optimizing throughput and resource utilization using pipelining: Transformation based approach.
VLSI Signal Processing, 1994

A CAD environment for Real-time DSP implementations on multiprocessors.
VLSI Signal Processing, 1994

Estimating implementation bounds for real time DSP application specific circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1994

Is it Possible to achieve a Teraflop/s on a chip? From High Performance Algorithms to Architectures.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Algorithm selection: a quantitative computation-intensive optimization approach.
Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Specification and support for multidimensional DSP in the SILAGE language.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

Concurrency characteristics in DSP programs.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

Maximizing the Throughput of High Performance DSP Applications Using Behavioral Transformations.
Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Memory Estimation for High Level Synthesis.
Proceedings of the 31st Conference on Design Automation, 1994

1993
Scheduling of DSP programs onto multiprocessors for maximum throughput.
IEEE Trans. Signal Processing, 1993

High level synthesis for reconfigurable datapath structures.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

Instruction set mapping for performance optimization.
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993

On unlimited parallelism of DSP arithmetic computations.
Proceedings of the IEEE International Conference on Acoustics, 1993

High Level Synthesis Techniques for Efficient Built-In-Self Repair.
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, 1993

Heterogeneous BISR techniques for yield and reliability enhancement using high level synthesis transformations.
Proceedings of the International Conference on Application-Specific Array Processors, 1993

1992
Scheduling Algorithms For Hierarchical Data Control Flow Graphs.
I. J. Circuit Theory and Applications, 1992

Maximally fast and arbitrarily fast implementation of linear computations.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

HYPER-LP: a system for power minimization using architectural transformations.
Proceedings of the 1992 IEEE/ACM International Conference on Computer-Aided Design, 1992

1991
An integrated CAD system for algorithm-specific IC design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1991

Fast Prototyping of Datapath-Intensive Architectures.
IEEE Design & Test of Computers, 1991

Optimizing Resource Utilization Using Transformations.
Proceedings of the 1991 IEEE/ACM International Conference on Computer-Aided Design, 1991

1990
An efficient microcode compiler for application specific DSP processors.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1990

Hardware for Hidden Markov-Model-Based, Large-Vocabulary Real-Time Speech Recognition.
Proceedings of the Speech and Natural Language: Proceedings of a Workshop Held at Hidden Valley, 1990

CGE: automatic generation of controllers in the CATHEDRAL-II silicon compiler.
Proceedings of the European Design Automation Conference, 1990

1989
Interprocessor communication in synchronous multiprocessor digital signal processing chips.
IEEE Trans. Acoustics, Speech, and Signal Processing, 1989

A Scheduling and Resource Allocation Algorithm for Hierarchical Signal Flow Graphs.
Proceedings of the 26th ACM/IEEE Design Automation Conference, 1989

1988
Architectural strategies for an application-specific synchronous multiprocessor environment.
IEEE Trans. Acoustics, Speech, and Signal Processing, 1988

1986
An intelligent module generator environment.
Proceedings of the 23rd ACM/IEEE Design Automation Conference. Las Vegas, 1986

1985
An Integrated Automated Layout Generation System for DSP Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985


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