Pavan Kumar Chundi

Orcid: 0000-0002-8869-1736

According to our database1, Pavan Kumar Chundi authored at least 10 papers between 2017 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2022
Channel Estimation Using Deep Learning on an FPGA for 5G Millimeter-Wave Communication Systems.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021
Algorithm Hardware Co-Design of Neural Networks for Always-On Devices.
PhD thesis, 2021

MEDAC: A Metastability Condition Detection and Correction Technique for a Near-Threshold-Voltage Multi-Voltage-/Frequency-Domain Network-on-Chip.
IEEE J. Solid State Circuits, 2021

2020
Always-On, Sub-300-nW, Event-Driven Spiking Neural Network based on Spike-Driven Clock-Generation and Clock- and Power-Gating for an Ultra-Low-Power Intelligent Device.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2020

2019
MemNet: Memory-Efficiency Guided Neural Architecture Search with Augment-Trim learning.
CoRR, 2019

FPGA-based Acceleration of Binary Neural Network Training with Minimized Off-Chip Memory Access.
Proceedings of the 2019 IEEE/ACM International Symposium on Low Power Electronics and Design, 2019

2018
A 0.78-µW 96-Ch. Deep Sub-Vt Neural Spike Processor Integrated with a Nanowatt Power Management Unit.
Proceedings of the 44th IEEE European Solid State Circuits Conference, 2018

High-Capacity Fingerprint Recognition System based on a Dynamic Memory-Capacity Estimation Technique.
Proceedings of the 2018 IEEE Biomedical Circuits and Systems Conference, 2018

2017
Compact and voltage-scalable sensor for accurate thermal sensing in dynamic thermal management.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

Hotspot monitoring and Temperature Estimation with miniature on-chip temperature sensors.
Proceedings of the 2017 IEEE/ACM International Symposium on Low Power Electronics and Design, 2017


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