Peng Xu

Orcid: 0000-0001-5756-3494

Affiliations:

Chinese University of Hong Kong, Department of Computer Science and Engineering, Hong Kong
Harbin Institute of Technology, Shenzhen, China (former)
Central South University, Changsha, China (former)

According to our database¹, Peng Xu authored at least 31 papers between 2021 and 2026.

Collaborative distances:

Dijkstra number² of four.
Erdős number³ of four.

Timeline

Legend:

Book In proceedings Article PhD thesis Dataset Other

Bibliography

2026

Attention-Based EDA Tool Parameter Explorer: From Hybrid Parameters to Multi-QoR Metrics.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., February, 2026

RATuner: Retrieval-Augmented VLSI Flow Design Parameter Tuning Framework.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference, 2026

Submodular Maximization-inspired Adaptive Routing Bend Space Planning.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference, 2026

EDA Flow Matters: Stage-Aware Parameter Optimization of Tool Chain.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference, 2026

IP-Matcher: An Efficient One-to-Many Matching Framework for Analog Circuit Design and Reusing.

[BibT_eX]

[DOI]

Proceedings of the Design, Automation & Test in Europe Conference, 2026

CausalTuner: Will Causality Help High-Dimensional EDA Tool Parameter Tuning.

[BibT_eX]

[DOI]

Proceedings of the 31st Asia and South Pacific Design Automation Conference, 2026

KCLNet: Electrically Equivalence-Oriented Graph Representation Learning for Analog Circuits.

[BibT_eX]

[DOI]

Proceedings of the Fortieth AAAI Conference on Artificial Intelligence, 2026

2025

PARoute2: Enhanced Analog Routing via Performance-Drive Guidance Generation.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2025

SMART: Graph Learning-Boosted Subcircuit Matching for Large-Scale Analog Circuits.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., October, 2025

Rank-DSE: Neural Pareto Comparator of Microarchitecture Design Space Exploration.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., September, 2025

Prerouting Timing Prediction Across Different Technology Nodes.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., July, 2025

Learning-Driven Physically Aware Large-Scale Circuit Gate Sizing.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., May, 2025

RSizing: Robust Bayesian Optimization for Analog Circuit Sizing Under Process Variations.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2025

Rank-based Multi-objective Approximate Logic Synthesis via Monte Carlo Tree Search.

[BibT_eX]

[DOI]

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

LLMShare: Optimizing LLM Inference Serving with Hardware Architecture Exploration.

[BibT_eX]

[DOI]

Proceedings of the 62nd ACM/IEEE Design Automation Conference, 2025

2024

DeepOTF: Learning Equations-constrained Prediction for Electromagnetic Behavior.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2024

RankTuner: When Design Tool Parameter Tuning Meets Preference Bayesian Optimization.

[BibT_eX]

[DOI]

Proceedings of the 43rd IEEE/ACM International Conference on Computer-Aided Design, 2024

Disentangle, Align and Generalize: Learning A Timing Predictor from Different Technology Nodes.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Performance-driven Analog Routing via Heterogeneous 3DGNN and Potential Relaxation.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

NeuroSelect: Learning to Select Clauses in SAT Solvers.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Efficient Bilevel Source Mask Optimization.

[BibT_eX]

[DOI]

Proceedings of the 61st ACM/IEEE Design Automation Conference, 2024

Performance-Driven Analog Layout Automation: Current Status and Future Directions (Invited Paper).

[BibT_eX]

[DOI]

Proceedings of the 29th Asia and South Pacific Design Automation Conference, 2024

p-Laplacian Adaptation for Generative Pre-trained Vision-Language Models.

[BibT_eX]

[DOI]

Proceedings of the Thirty-Eighth AAAI Conference on Artificial Intelligence, 2024

2023

Adversarial Robustness in Graph-Based Neural Architecture Search for Edge AI Transportation Systems.

[BibT_eX]

[DOI]

Ship Peng Xu

Ke Wang

Mohammad Mehedi Hassan

IEEE Trans. Intell. Transp. Syst., August, 2023

An Interpretive Perspective: Adversarial Trojaning Attack on Neural-Architecture-Search Enabled Edge AI Systems.

[BibT_eX]

[DOI]

Ship Peng Xu

Ke Wang

Md. Rafiul Hassan

Mohammad Mehedi Hassan

Chien-Ming Chen

IEEE Trans. Ind. Informatics, 2023

Do Not Train It: A Linear Neural Architecture Search of Graph Neural Networks.

[BibT_eX]

[DOI]

CoRR, 2023

Do Not Train It: A Linear Neural Architecture Search of Graph Neural Networks.

[BibT_eX]

[DOI]

Proceedings of the International Conference on Machine Learning, 2023

Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023

2021

Neural-Architecture-Search-Based Multiobjective Cognitive Automation System.

[BibT_eX]

[DOI]

IEEE Syst. J., 2021

A Trusted Consensus Scheme for Collaborative Learning in the Edge AI Computing Domain.

[BibT_eX]

[DOI]

Mohammad Mehedi Hassan

Claudio Savaglio

Pasquale Pace

Gianluca Aloi

IEEE Netw., 2021

Neural Architecture Search for Robust Networks in 6G-Enabled Massive IoT Domain.

[BibT_eX]

[DOI]

IEEE Internet Things J., 2021

Peng Xu

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