Ping-Hung Yuh

According to our database, Ping-Hung Yuh authored at least 20 papers between 2004 and 2015.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2015

Accurate 3-D capacitance extractions for advanced nanometer CMOS nodes.

Keh-Jeng Chang, Shih-Hao Lee, Kuo-Fu Lee, Ping-Hung Yuh, Ho-Che Yu, Wen-Cheng Huang, Victor C. Y. Chang

Proceedings of the VLSI Design, Automation and Test, 2015

2012

Optimized 3D Network-on-Chip Design Using Simulated Allocation.

Pingqiang Zhou, Ping-Hung Yuh, Sachin S. Sapatnekar

ACM Trans. Design Autom. Electr. Syst., 2012

2011

A SAT-based routing algorithm for cross-referencing biochips.

Ping-Hung Yuh, Cliff Chiung-Yu Lin, Tsung-Wei Huang, Tsung-Yi Ho, Chia-Lin Yang, Yao-Wen Chang

Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011

2010

Application-specific 3D Network-on-Chip design using simulated allocation.

Pingqiang Zhou, Ping-Hung Yuh, Sachin S. Sapatnekar

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010

2009

Leakage-aware task scheduling for partially dynamically reconfigurable FPGAs.

Ping-Hung Yuh, Chia-Lin Yang, Chi-Feng Li, Chung-Hsiang Lin

ACM Trans. Design Autom. Electr. Syst., 2009

T-trees: A tree-based representation for temporal and three-dimensional floorplanning.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

ACM Trans. Design Autom. Electr. Syst., 2009

A Progressive-ILP-Based Routing Algorithm for the Synthesis of Cross-Referencing Biochips.

Ping-Hung Yuh, Sachin S. Sapatnekar, Chia-Lin Yang, Yao-Wen Chang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

2008

BioRoute: A Network-Flow-Based Routing Algorithm for the Synthesis of Digital Microfluidic Biochips.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

MP-Trees: A Packing-Based Macro Placement Algorithm for Modern Mixed-Size Designs.

Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Few-Juh Huang, T.-Y. Liu

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

A progressive-ILP based routing algorithm for cross-referencing biochips.

Ping-Hung Yuh, Sachin S. Sapatnekar, Chia-Lin Yang, Yao-Wen Chang

Proceedings of the 45th Design Automation Conference, 2008

2007

Temporal floorplanning using the three-dimensional transitive closure subGraph.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

ACM Trans. Design Autom. Electr. Syst., 2007

Placement of defect-tolerant digital microfluidic biochips using the T-tree formulation.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

ACM J. Emerg. Technol. Comput. Syst., 2007

Post-placement leakage optimization for partially dynamically reconfigurable FPGAs.

Chi-Feng Li, Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

Proceedings of the 2007 International Symposium on Low Power Electronics and Design, 2007

BioRoute: a network-flow based routing algorithm for digital microfluidic biochips.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

Proceedings of the 2007 International Conference on Computer-Aided Design, 2007

MP-trees: A Packing-Based Macro Placement Algorithm for Mixed-Size Designs.

Tung-Chieh Chen, Ping-Hung Yuh, Yao-Wen Chang, Fwu-Juh Huang, Denny Liu

Proceedings of the 44th Design Automation Conference, 2007

2006

Placement of digital microfluidic biochips using the t-tree formulation.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

Proceedings of the 43rd Design Automation Conference, 2006

2005

Joint exploration of architectural and physical design spaces with thermal consideration.

Yen-Wei Wu, Chia-Lin Yang, Ping-Hung Yuh, Yao-Wen Chang

Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005

A routing algorithm for flip-chip design.

Jia-Wei Fang, I-Jye Lin, Ping-Hung Yuh, Yao-Wen Chang, Jyh-Herng Wang

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005

2004

Temporal floorplanning using the T-tree formulation.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang

Proceedings of the 2004 International Conference on Computer-Aided Design, 2004

Temporal floorplanning using 3D-subTCG.

Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang, Hsin-Lung Chen

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004