Junghyup Lee
Orcid: 0000-0001-9427-6179
According to our database1,
Junghyup Lee
authored at least 36 papers
between 2006 and 2024.
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Bibliography
2024
33.11 A Hybrid Recording System with 10kHz-BW 630mVPP 84.6dB-SNDR 173.3dB-FOMSNDR and 5kHz-BW 114dB-DR for Simultaneous ExG and Biocurrent Acquisition.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
3.1 A PVT-Insensitive Sub-Ranging Current Reference Achieving 11.4ppm/°C from -20°C to 125°C.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024
2023
A 1V 136.6dB-DR 4kHz-BW $\Delta\Sigma$ Current-to-Digital Converter with a Truncation-Noise-Shaped Baseline-Servo-Loop in 0.18\mu\mathrm{m}$ CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
A 1V-Supply $1.85\mathrm{V}_{\text{PP}}$ -Input-Range 1kHz-BW 181.9dB-FOMDR179.4dB-FOMSNDR 2<sup>nd</sup>-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS.
Proceedings of the IEEE International Solid- State Circuits Conference, 2023
Proceedings of the IEEE/CVF International Conference on Computer Vision, 2023
A 0.9V 2MHz 6.4x-Slope-Boosted Quadrature-Phase Relaxation Oscillator with 164.2dBc/Hz FoM and 62.5ppm Period Jitter in 0.18μm CMOS.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2023
2022
A 46-nF/10-MΩ Range 114-aF/0.37-Ω Resolution Parasitic- and Temperature-Insensitive Reconfigurable RC-to-Digital Converter in 0.18-μm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022
IEEE Trans. Pattern Anal. Mach. Intell., 2022
A 2.54μJ∙ppm<sup>2</sup>-FOMS Supply- and Temperature-Independent Time-Locked ΔΣ Capacitance-to-Digital Converter in 0.18-μm CMOS.
Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022
Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022
A 0.7V 17fJ/Step-FOMW 178.1dB-FOMSNDR 10kHz-BW 560mVPP True-ExG Biopotential Acquisition System with Parasitic-Insensitive 421MΩ Input Impedance in 0.18μm CMOS.
Proceedings of the IEEE International Solid-State Circuits Conference, 2022
SIF-NPU: A 28nm 3.48 TOPS/W 0.25 TOPS/mm<sup>2</sup> CNN Accelerator with Spatially Independent Fusion for Real-Time UHD Super-Resolution.
Proceedings of the 48th IEEE European Solid State Circuits Conference, 2022
OIMNet++: Prototypical Normalization and Localization-Aware Learning for Person Search.
Proceedings of the Computer Vision - ECCV 2022, 2022
2021
Closed-Loop Neuromodulation for Parkinson's Disease: Current State and Future Directions.
IEEE Trans. Mol. Biol. Multi Scale Commun., 2021
Adaptive Input-to-Neuron Interlink Development in Training of Spike-Based Liquid State Machines.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
Learning by Aligning: Visible-Infrared Person Re-identification using Cross-Modal Correspondences.
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021
Proceedings of the 2021 IEEE/CVF International Conference on Computer Vision, 2021
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2021
2020
IEEE J. Solid State Circuits, 2020
A Multi-Mode ULP Receiver Based on an Injection-Locked Oscillator for IoT Applications.
IEEE Access, 2020
A 1.0 V, 5.4 pJ/bit GFSK Demodulator Based on an Injection Locked Ring Oscillator for Low-IF Receivers.
IEEE Access, 2020
Proceedings of the Computer Vision - ECCV 2020, 2020
2019
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition, 2019
2018
A 114-AF RMS- Resolution 46-NF/10-MΩ -Range Digital-Intensive Reconfigurable RC-to-Digital Converter with Parasitic-Insensitive Femto-Farad Baseline Sensing.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018
A 110dB-CMRR 100dB-PSRR multi-channel neural-recording amplifier system using differentially regulated rejection ratio enhancement in 0.18μm CMOS.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the International SoC Design Conference, 2018
An ultra-low-noise differential relaxation oscillator based on a swing-boosting scheme.
Proceedings of the 23rd Asia and South Pacific Design Automation Conference, 2018
2017
A 1 V 2.5 μW fully-differential ASK demodulator with 12.5 pJ/bit FOM for ultra-low power biomedical applications.
Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017
A neural recording amplifier based on adaptive SNR optimization technique for long-term implantation.
Proceedings of the IEEE Biomedical Circuits and Systems Conference, 2017
2016
5.10 A 1.4V 10.5MHz swing-boosted differential relaxation oscillator with 162.1dBc/Hz FOM and 9.86psrms period jitter in 0.18µm CMOS.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
2015
5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015
2014
30.7 A 60Mb/s wideband BCC transceiver with 150pJ/b RX and 31pJ/b TX for emerging wearable applications.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014
2012
A 1.4-µW 24.9-ppm/°C Current Reference With Process-Insensitive Temperature Compensation in 0.18-µm CMOS.
IEEE J. Solid State Circuits, 2012
2006
J. Circuits Syst. Comput., 2006