Rizwan Tariq Syed

According to our database, Rizwan Tariq Syed authored at least 6 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

Towards Reconfigurable CNN Accelerator for FPGA Implementation.

Rizwan Tariq Syed, Marko S. Andjelkovic, Markus Ulbricht, Milos Krstic

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

Artificial Neural Network Accelerator for Classification of In-Field Conducted Noise in Integrated Circuits' DC Power Lines.

Fabian Vargas, Douglas Borba, Juliano Benfica, Rizwan Tariq Syed

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

Towards a Smart Multi-Sensor Ionizing Radiation Monitoring System.

Marko S. Andjelkovic, Junchao Chen, Rizwan Tariq Syed, Fabian Vargas, Markus Ulbricht, Milos Krstic, Stefan D. Ilic, Milos Marjanovic, Sandra Veljkovic, Nikola Mitrovic, Danijel Dankovic, Goran S. Ristic, Russell Duane, Nikola Vasovic, Aleksandar Jaksic, Alberto J. Palma, Antonio M. Lallena, Miguel A. Carvajal

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022

FPGA-Based Acceleration of Convolutional Neural Network for Gesture Recognition Using mm-Wave FMCW Radar.

Rizwan Tariq Syed, Yanhua Zhao, Markus Ulbricht, Vladica Sark, Milos Krstic

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022

2020

Fault Tolerant Platform for Communication and Distance Measurement in Highly Automated Driving.

Rizwan Tariq Syed, Markus Ulbricht, Wael A. Ahmad, Herman Jalli Ng, Vladica Sark, Raqibul Hasan, Milos Krstic

Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

2019

Developing a Configurable Fault Tolerant Multicore System for Optimized Sensor Processing.

Markus Ulbricht, Rizwan Tariq Syed, Milos Krstic

Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019