Rizwan Tariq Syed

According to our database, Rizwan Tariq Syed authored at least 11 papers between 2019 and 2026.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2026

Special Session: Optimizing Edge AI - Current Challenges and the Neuromorphic Outlook.

Milan R. Dincic, Zoran Peric, Davide Bertozzi, Alice Bizzarri, Rizwan Tariq Syed, Edward G. Jones, Riccardo Zese, Marko S. Andjelkovic, Fabian Luis Vargas, Milos Krstic, Oliver Rhodes, Modhe Almelihi, Tamara Milovanovic, Ivan Popovic, Sofija Peric

Proceedings of the 29th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2026

2025

Fault-tolerant CNN accelerator with reconfigurable capabilities.

Rizwan Tariq Syed

PhD thesis, 2025

AIDA4Edge: Twinning for Excellence in Adaptive Edge Artificial Intelligence.

Marko S. Andjelkovic, Rizwan Tariq Syed, Alessandro Veronesi, Fabian Vargas, Markus Ulbricht, Leticia Bolzani Poehls, Milos Krstic, Davide Bertozzi, Edward G. Jones, Oliver Rhodes, Riccardo Zese, Michele Favalli, Alice Bizzarri, Evelina Lamma, Marco Gavanelli, Elena Bellodi, Zoran Peric, Jelena Nikolic, Milan R. Dincic, Aleksandra Jovanovic, Dejan Ciric, Nikola Vucic, Sofija Peric, Jelena Jovanovic, Milica Stojanovic, Tatjana R. Nikolic, Goran Nikolic, Jelena Nedeljkovic, Danijel Dankovic, Emilija Zivanovic, Milos Marjanovic, Sandra Veljkovic, Nikola Mitrovic, Bratislav Predic, Tamara Milovanovic

Proceedings of the 28th Euromicro Conference on Digital System Design, 2025

2024

FPGA Implementation of a Fault-Tolerant Fused and Branched CNN Accelerator With Reconfigurable Capabilities.

Rizwan Tariq Syed, Yanhua Zhao, Junchao Chen, Marko S. Andjelkovic, Markus Ulbricht, Milos Krstic

IEEE Access, 2024

Aging and Soft Error Resilience in Reconfigurable CNN Accelerators Employing a Multi-Purpose On-Chip Sensor.

Rizwan Tariq Syed, Fabian Vargas, Marko S. Andjelkovic, Markus Ulbricht, Milos Krstic

Proceedings of the 25th IEEE Latin American Test Symposium, 2024

2023

Towards Reconfigurable CNN Accelerator for FPGA Implementation.

Rizwan Tariq Syed, Marko S. Andjelkovic, Markus Ulbricht, Milos Krstic

IEEE Trans. Circuits Syst. II Express Briefs, March, 2023

Artificial Neural Network Accelerator for Classification of In-Field Conducted Noise in Integrated Circuits' DC Power Lines.

Fabian Vargas, Douglas Borba, Juliano Benfica, Rizwan Tariq Syed

Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023

Towards a Smart Multi-Sensor Ionizing Radiation Monitoring System.

Marko S. Andjelkovic, Junchao Chen, Rizwan Tariq Syed, Fabian Vargas, Markus Ulbricht, Milos Krstic, Stefan D. Ilic, Milos Marjanovic, Sandra Veljkovic, Nikola Mitrovic, Danijel Dankovic, Goran S. Ristic, Russell Duane, Nikola Vasovic, Aleksandar Jaksic, Alberto J. Palma, Antonio M. Lallena, Miguel Ángel Carvajal

Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022

FPGA-Based Acceleration of Convolutional Neural Network for Gesture Recognition Using mm-Wave FMCW Radar.

Rizwan Tariq Syed, Yanhua Zhao, Markus Ulbricht, Vladica Sark, Milos Krstic

Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2022, Oslo, 2022

2020

Fault Tolerant Platform for Communication and Distance Measurement in Highly Automated Driving.

Rizwan Tariq Syed, Markus Ulbricht, Wael A. Ahmad, Herman Jalli Ng, Vladica Sark, Raqibul Hasan, Milos Krstic

Proceedings of the 9th Mediterranean Conference on Embedded Computing, 2020

2019

Developing a Configurable Fault Tolerant Multicore System for Optimized Sensor Processing.

Markus Ulbricht, Rizwan Tariq Syed, Milos Krstic

Proceedings of the 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2019