Robert Kunzelmann

According to our database, Robert Kunzelmann authored at least 9 papers between 2023 and 2025.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2025

Execute Your Darlings: Dynamic Execution of High-Level Formal Specifications for Validation and Early Prototyping.

Robert Kunzelmann, Zeyad Tahoun, Wolfgang Ecker

Proceedings of the Rapid Simulation and Performance Evaluation for Design Workshop, 2025

Implementation of Dynamic SISD-SIMD Integer Dividers.

Gianluca Radi, Ares Tahiraga, Robert Kunzelmann, Ties Jan Henderikus Kluter, Wolfgang Ecker

Proceedings of the 28th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2025

2024

Flexible Generation of Fast and Accurate Software Performance Simulators From Compact Processor Descriptions.

Conrad Foik, Robert Kunzelmann, Daniel Mueller-Gritschneder, Ulf Schlichtmann

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., November, 2024

The Argument for Meta-Modeling-Based Approaches to Hardware Generation Languages.

Johannes Schreiner, Daniel Gerl, Robert Kunzelmann, Paritosh Kumar Sinha, Wolfgang Ecker

CoRR, 2024

Leveraging Large Language Models for the Automated Documentation of Hardware Designs.

Saruni Fernando, Robert Kunzelmann, Daniela Sanchez Lopera, Jad Al Halabi, Wolfgang Ecker

Proceedings of the 13th Mediterranean Conference on Embedded Computing, 2024

Fake Timer: An Engine for Accurate Timing Estimation in Register Transfer Level Designs.

Daniela Sanchez Lopera, Robert Kunzelmann, Endri Kaja, Wolfgang Ecker

Proceedings of the 25th International Symposium on Quality Electronic Design, 2024

2023

CPU to FPGA Power Covert Channel in FPGA-SoCs.

Mathieu Gross, Robert Kunzelmann, Georg Sigl

IACR Cryptol. ePrint Arch., 2023

Effective Processor Model Generation from Instruction Set Simulator to Hardware Design.

Johannes Kappes, Robert Kunzelmann, Karsten Emrich, Conrad Foik, Daniel Mueller-Gritschneder, Wolfgang Ecker

Proceedings of the IEEE Nordic Circuits and Systems Conference, 2023

Modelling Peripheral Designs using FSM-like Notation for Complete Property Set Generation.

Endri Kaja, Nicolas Gerlin, Robert Kunzelmann, Keerthikumara Devarajegowda, Wolfgang Ecker

Proceedings of the 16th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2023