Jongsoo Lee

Orcid: 0009-0001-0082-2835

According to our database1, Jongsoo Lee authored at least 36 papers between 2003 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2024
Enhancement of virtual data quality using pre-trained Bayesian transfer learning under inaccurate and insufficient measurement data.
Adv. Eng. Informatics, 2024

4.2 A Tri-Band Dual-Concurrent Wi-Fi 802.11be Transceiver Achieving -46dB TX/RX EVM Floor at 7.1GHz for a 4K-QAM 320MHz Signal.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

4.3 A 43mm<sup>2</sup> Fully Integrated Legacy Cellular and 5G FR1 RF Transceiver with 24RX/3TX Supporting Inter-Band 7CA/5CA 4×4 MIMO with 1K-QAM.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2023
Virtual data-based generative optimization using domain-adaptive designable data augmentation (DADDA): Application to electric vehicle design.
Expert Syst. Appl., December, 2023

Diagnosis-based domain-adaptive design using designable data augmentation and Bayesian transfer learning: Target design estimation and validation.
Appl. Soft Comput., August, 2023

Crack growth degradation-based diagnosis and design of high pressure liquefied natural gas pipe via designable data-augmented anomaly detection.
J. Comput. Des. Eng., July, 2023

Randomized learning-based classification of sound quality using spectrogram image and time-series data: A practical perspective.
Eng. Appl. Artif. Intell., April, 2023

Prediction of Internal Temperature of Starter Solenoid Via PoF-Based Fault Reproduction Experiment.
IEEE Trans. Instrum. Meas., 2023

DuoGAT: Dual Time-oriented Graph Attention Networks for Accurate, Efficient and Explainable Anomaly Detection on Time-series.
Proceedings of the 32nd ACM International Conference on Information and Knowledge Management, 2023

2022
A 5 Gb/s Time-Interleaved Voltage-Mode Duobinary Encoding Scheme for 3-D-Stacked IC.
IEEE J. Solid State Circuits, 2022

Multiclass anomaly detection for unsupervised and semi-supervised data based on a combination of negative selection and clonal selection algorithms.
Appl. Soft Comput., 2022

Instance-based transfer learning method via modified domain-adversarial neural network with influence function: Applications to design metamodeling and fault diagnosis.
Appl. Soft Comput., 2022

Statistical Classification of Vehicle Interior Sound Through Upsampling-Based Augmentation and Correction Using 1D CNN and LSTM.
IEEE Access, 2022

A diversity personalization approach towards recommending POIs for Jeju island.
Proceedings of the SAC '22: The 37th ACM/SIGAPP Symposium on Applied Computing, Virtual Event, April 25, 2022

2021
A 0.166 pJ/b/pF, 3.5-5 Gb/s TSV I/O Interface With V<sub>OH</sub> Drift Control.
IEEE Trans. Circuits Syst. II Express Briefs, 2021

Data Augmentation-Based Prediction of System Level Performance under Model and Parameter Uncertainties: Role of Designable Generative Adversarial Networks (DGAN).
Reliab. Eng. Syst. Saf., 2021

6.1 A Low-Power and Low-Cost 14nm FinFET RFIC Supporting Legacy Cellular and 5G FR1.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

C-band Air-to-Ground Communications for Small Drone.
Proceedings of the International Conference on Information and Communication Technology Convergence, 2021

2020
Early stage data-based probabilistic wear life prediction and maintenance interval optimization of driving wheels.
Reliab. Eng. Syst. Saf., 2020

NB-IoT and GNSS All-In-One System-On-Chip Integrating RF Transceiver, 23-dBm CMOS Power Amplifier, Power Management Unit, and Clock Management System for Low Cost Solution.
IEEE J. Solid State Circuits, 2020

An RF Transceiver with Full Digital Interface Supporting 5G New Radio FR1 with 3.84Gbps DL/1.92Gbps UL and Dual-Band GNSS in 14nm FinFET CMOS.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

30.2 NB-IoT and GNSS All-in-One System-on-Chip Integrating RF Transceiver, 23dBm CMOS Power Amplifier, Power Management Unit and Clock Management System for Low-Cost Solution.
Proceedings of the 2020 IEEE International Solid- State Circuits Conference, 2020

2019
Multi-objective design of thickness and curvature of a bendable structure considering delamination and strength characteristics.
J. Comput. Des. Eng., 2019

Reliability-based MOGA design optimization using probabilistic response surface method and bayesian neural network.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019

2018
Reinforcement Learning Based Data Self-Destruction Scheme for Secured Data Management.
Symmetry, 2018

Determination of the best distribution and effective interval using statistical characterization of uncertain variables.
J. Comput. Des. Eng., 2018

Bayesian estimation of the lethargy coefficient for probabilistic fatigue life model.
J. Comput. Des. Eng., 2018

2017
Method of Building a Security Vulnerability Information Collection and Management System for Analyzing the Security Vulnerabilities of IoT Devices.
Proceedings of the Advanced Multimedia and Ubiquitous Engineering, 2017

2011
A Dual-Mode Power Amplifier With On-Chip Switch Bias Control Circuits for LTE Handsets.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

Fully integrated UHF RFID mobile reader with power amplifiers using System-in-Package (SiP).
IEICE Electron. Express, 2011

A parallel power amplifier with load impedance transformation for optimized low power performance.
IEICE Electron. Express, 2011

A realization of constraint feasibility in a moving least squares response surface based approximate optimization.
Comput. Optim. Appl., 2011

2010
Effect of bias circuits on receiver band noise of GaAs HBT power amplifiers.
IEICE Electron. Express, 2010

2009
RF power detector design with temperature compensation for power amplifiers bias control.
IEICE Electron. Express, 2009

2007
A 8-GHz SiGe HBT VCO Design on a Low Resistive Silicon Substrate Using GSML.
IEEE Trans. Circuits Syst. I Regul. Pap., 2007

2003
RFIC Loadpull Simulations Implementing Best Practice RF and Mixed-Signal Design using an Integrated Agilent and Cadence EDA tool.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003


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