Seyedramin Rasoulinezhad

According to our database, Seyedramin Rasoulinezhad authored at least 14 papers between 2019 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

FPGA Architecture Exploration for DNN Acceleration.

Esther Roorda, Seyedramin Rasoulinezhad, Philip H. W. Leong, Steven J. E. Wilton

ACM Trans. Reconfigurable Technol. Syst., 2022

Rethinking Embedded Blocks for Machine Learning Applications.

Seyedramin Rasoulinezhad, Esther Roorda, Steve Wilton, Philip H. W. Leong, David Boland

ACM Trans. Reconfigurable Technol. Syst., 2022

NITI: Training Integer Neural Networks Using Integer-Only Arithmetic.

Maolin Wang, Seyedramin Rasoulinezhad, Philip H. W. Leong, Hayden Kwok-Hay So

IEEE Trans. Parallel Distributed Syst., 2022

Applications and Techniques for Fast Machine Learning in Science.

Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Dongning Guo, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Shen Wang, Thomas K. Warburton

Frontiers Big Data, 2022

2021

Applications and Techniques for Fast Machine Learning in Science.

Allison McCarn Deiana, Nhan Tran, Joshua Agar, Michaela Blott, Giuseppe Di Guglielmo, Javier M. Duarte, Philip C. Harris, Scott Hauck, Mia Liu, Mark S. Neubauer, Jennifer Ngadiuba, Seda Ogrenci Memik, Maurizio Pierini, Thea Aarrestad, Steffen Bähr, Jürgen Becker, Anne-Sophie Berthold, Richard J. Bonventre, Tomás E. Müller-Bravo, Markus Diefenthaler, Zhen Dong, Nick Fritzsche, Amir Gholami, Ekaterina Govorkova, Kyle J. Hazelwood, Christian Herwig, Babar Khan, Sehoon Kim, Thomas Klijnsma, Yaling Liu, Kin Ho Lo, Tri Nguyen, Gianantonio Pezzullo, Seyedramin Rasoulinezhad, Ryan A. Rivera, Kate Scholberg, Justin Selig, Sougata Sen, Dmitri Strukov, William Tang, Savannah Thais, Kai Lukas Unger, Ricardo Vilalta, Belinavon Krosigk, Thomas K. Warburton, Maria Acosta Flechas, Anthony Aportela, Thomas Calvet, Leonardo Cristella, Daniel Diaz, Caterina Doglioni, Maria Domenica Galati, Elham E Khoda, Farah Fahim, Davide Giri, Benjamin Hawks, Duc Hoang, Burt Holzman, Shih-Chieh Hsu, Sergo Jindariani, Iris Johnson, Raghav Kansal, Ryan Kastner, Erik Katsavounidis, Jeffrey D. Krupa, Pan Li, Sandeep Madireddy, Ethan Marx, Patrick McCormack, Andres Meza, Jovan Mitrevski, Mohammed Attia Mohammed, Farouk Mokhtar, Eric A. Moreno, Srishti Nagu, Rohin Narayan, Noah Palladino, Zhiqiang Que, Sang Eon Park, Subramanian Ramamoorthy, Dylan S. Rankin, Simon Rothman, Ashish Sharma, Sioni Summers, Pietro Vischia, Jean-Roch Vlimant, Olivia Weng

CoRR, 2021

Modified Joint Channel-and-Data Estimation for One-Bit Massive MIMO.

Mohammadhossein Bahari, Seyedramin Rasoulinezhad, Mahdi Amiri, Farzam Gilani, Saeed Saadatnejad, Seyed Alireza Nezamalhosseini, Mahdi Shabany

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

A Block Minifloat Representation for Training Deep Neural Networks.

Sean Fox, Seyedramin Rasoulinezhad, Julian Faraone, David Boland, Philip H. W. Leong

Proceedings of the 9th International Conference on Learning Representations, 2021

APIR-DSP: An approximate PIR-DSP architecture for error-tolerant applications.

Yuan Dai, Simin Liu, Yao Lu, Hao Zhou, Seyedramin Rasoulinezhad, Philip H. W. Leong, Lingli Wang

Proceedings of the International Conference on Field-Programmable Technology, 2021

MLBlocks: FPGA Blocks for Machine Learning Applications.

Seyedramin Rasoulinezhad, David Boland, Philip H. W. Leong

Proceedings of the FPGA '21: The 2021 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, Virtual Event, USA, February 28, 2021

2020

LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations.

Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong

CoRR, 2020

MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency.

Seyedramin Rasoulinezhad, Sean Fox, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong

CoRR, 2020

LUXOR: An FPGA Logic Cell Architecture for Efficient Compressor Tree Implementations.

Seyedramin Rasoulinezhad, Siddhartha, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong

Proceedings of the FPGA '20: The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2020

2019

MajorityNets: BNNs Utilising Approximate Popcount for Improved Efficiency.

Seyedramin Rasoulinezhad, Sean Fox, Hao Zhou, Lingli Wang, David Boland, Philip H. W. Leong

Proceedings of the International Conference on Field-Programmable Technology, 2019

PIR-DSP: An FPGA DSP Block Architecture for Multi-precision Deep Neural Networks.

Seyedramin Rasoulinezhad, Hao Zhou, Lingli Wang, Philip H. W. Leong

Proceedings of the 27th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2019