Shervin Roshanisefat

According to our database, Shervin Roshanisefat authored at least 9 papers between 2016 and 2021.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2021

Data Flow Obfuscation: A New Paradigm for Obfuscating Circuits.

Kimia Zamiri Azar, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, Christos P. Sotiriou, Avesta Sasan

IEEE Trans. Very Large Scale Integr. Syst., 2021

RANE: An Open-Source Formal De-obfuscation Attack for Reverse Engineering of Logic Encrypted Circuits.

Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan

Proceedings of the GLSVLSI '21: Great Lakes Symposium on VLSI 2021, 2021

2020

SAT-Hard Cyclic Logic Obfuscation for Protecting the IP in the Manufacturing Supply Chain.

Shervin Roshanisefat, Hadi Mardani Kamali, Houman Homayoun, Avesta Sasan

IEEE Trans. Very Large Scale Integr. Syst., 2020

ExTru: A Lightweight, Fast, and Secure Expirable Trust for the Internet of Things.

Hadi Mardani Kamali, Kimia Zamiri Azar, Shervin Roshanisefat, Ashkan Vakil, Avesta Sasan

CoRR, 2020

DFSSD: Deep Faults and Shallow State Duality, A Provably Strong Obfuscation Solution for Circuits with Restricted Access to Scan Chain.

Shervin Roshanisefat, Hadi Mardani Kamali, Kimia Zamiri Azar, Sai Manoj Pudukotai Dinakarrao, Naghmeh Karimi, Houman Homayoun, Avesta Sasan

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

2019

COMA: Communication and Obfuscation Management Architecture.

Kimia Zamiri Azar, Farnoud Farahmand, Hadi Mardani Kamali, Shervin Roshanisefat, Houman Homayoun, William Diehl, Kris Gaj, Avesta Sasan

Proceedings of the 22nd International Symposium on Research in Attacks, 2019

2018

Benchmarking the Capabilities and Limitations of SAT Solvers in Defeating Obfuscation Schemes.

Shervin Roshanisefat, Harshith K. Thirumala, Kris Gaj, Houman Homayoun, Avesta Sasan

Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018

SRCLock: SAT-Resistant Cyclic Logic Locking for Protecting the Hardware.

Shervin Roshanisefat, Hadi Mardani Kamali, Avesta Sasan

Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2016

A Three-Dimensional Networks-on-Chip Architecture with Dynamic Buffer Sharing.

Seyyed Hossein Seyyedaghaei Rezaei, Mehdi Modarressi, Masoud Daneshtalab, Shervin Roshanisefat

Proceedings of the 24th Euromicro International Conference on Parallel, 2016