William Diehl

Orcid: 0000-0002-6293-5018

According to our database1, William Diehl authored at least 36 papers between 2015 and 2022.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2022
MIPS Assembly Language Implementation of GIFT-64-128 Encryption.
IACR Cryptol. ePrint Arch., 2022

2021
Fault intensity map analysis with neural network key distinguisher.
J. Cryptogr. Eng., 2021

2020
SCAUL: Power Side-Channel Analysis With Unsupervised Learning.
IEEE Trans. Computers, 2020

Efficient Simultaneous Deployment of Multiple Lightweight Authenticated Ciphers.
IACR Cryptol. ePrint Arch., 2020

Power Side-Channel Attack Analysis: A Review of 20 Years of Study for the Layman.
Cryptogr., 2020

SCARL: Side-Channel Analysis with Reinforcement Learning on the Ascon Authenticated Cipher.
CoRR, 2020

SADDLE: Secure Aerial Data Delivery with Lightweight Encryption.
Proceedings of the Intelligent Computing, 2020

New Directions for NewHope: Improving Performance of Post-Quantum Cryptography through Algorithm-level Pipelining.
Proceedings of the International Conference on Field-Programmable Technology, 2020

RS-Mask: Random Space Masking as an Integrated Countermeasure against Power and Fault Analysis.
Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

Side Channel Resistance at a Cost: A Comparison of ARX-Based Authenticated Encryption.
Proceedings of the 30th International Conference on Field-Programmable Logic and Applications, 2020

2019
Hardware Implementations of NIST Lightweight Cryptographic Candidates: A First Look.
IACR Cryptol. ePrint Arch., 2019

A Comprehensive Framework for Fair and Efficient Benchmarking of Hardware Implementations of Lightweight Cryptography.
IACR Cryptol. ePrint Arch., 2019

Face-off between the CAESAR Lightweight Finalists: ACORN vs. Ascon.
IACR Cryptol. ePrint Arch., 2019

Vulnerability Analysis of a Soft Core Processor through Fine-grain Power Profiling.
IACR Cryptol. ePrint Arch., 2019

The BIG Cipher: Design, Security Analysis, and Hardware-Software Optimization Techniques.
IACR Cryptol. ePrint Arch., 2019

An Open-Source Platform for Evaluation of Hardware Implementations of Lightweight Authenticated Ciphers.
Proceedings of the 2019 International Conference on ReConFigurable Computing and FPGAs, 2019

COMA: Communication and Obfuscation Management Architecture.
Proceedings of the 22nd International Symposium on Research in Attacks, 2019

A Statistical Fault Analysis Methodology for the Ascon Authenticated Cipher.
Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust, 2019

FIMA: Fault Intensity Map Analysis.
Proceedings of the Constructive Side-Channel Analysis and Secure Design, 2019

2018
Improved Lightweight Implementations of CAESAR Authenticated Ciphers.
IACR Cryptol. ePrint Arch., 2018

Comparison of Cost of Protection against Differential Power Analysis of Selected Authenticated Ciphers.
Cryptogr., 2018

Comparing the Cost of Protecting Selected Lightweight Block Ciphers against Differential Power Analysis in Low-Cost FPGAs.
Comput., 2018

Fixing the CLOC with Fine-grain Leakage Analysis.
Proceedings of the 2018 Workshop on Attacks and Solutions in Hardware Security, 2018

2017
RTL implementations and FPGA benchmarking of selected CAESAR Round Two authenticated ciphers.
Microprocess. Microsystems, 2017

Attack on AES Implementation Exploiting Publicly-visible Partial Result.
IACR Cryptol. ePrint Arch., 2017

Minerva: Automated hardware optimization tool.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

Side-channel resistant soft core processor for lightweight block ciphers.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2017

A light-weight hardware/software co-design for pairing-based cryptography with low power and energy consumption.
Proceedings of the International Conference on Field Programmable Technology, 2017

Comparison of hardware and software implementations of selected lightweight block ciphers.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
CAESAR Hardware API.
IACR Cryptol. ePrint Arch., 2016

High-Speed RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two.
Proceedings of the 24th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2016

Implementation of a Boolean Masking Scheme for the SCREAM Cipher.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

RTL Implementations and FPGA Benchmarking of Three Authenticated Ciphers Competing in CAESAR Round Two.
Proceedings of the 2016 Euromicro Conference on Digital System Design, 2016

2015
GMU Hardware API for Authenticated Ciphers.
IACR Cryptol. ePrint Arch., 2015

Implementation of the SCREAM Tweakable Block Cipher in MSP430 Assembly Language.
IACR Cryptol. ePrint Arch., 2015

A universal hardware API for authenticated ciphers.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015


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