Siddharth Devarajan

According to our database, Siddharth Devarajan authored at least 9 papers between 2004 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

A 30GHz-BW < -57dB-IM3 Direct RF Receiver Analog Front End in 16nm FinFET.

Athanasios Ramkaj, Adalberto Cantoni, Gabriele Manganaro, Siddharth Devarajan, Michiel Steyaert, Filip Tavernier

Proceedings of the IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits 2022), 2022

2017

A 12-b 10-GS/s Interleaved Pipeline ADC in 28-nm CMOS Technology.

Siddharth Devarajan, Larry Singer, Dan Kelly, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow, Gabriele Manganaro

IEEE J. Solid State Circuits, 2017

16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.

Siddharth Devarajan, Larry Singer, Dan Kelly, Steve Kosic, Tao Pan, José B. Silva, Janet Brunsilius, Daniel Rey-Losada, Frank Murden, Carroll Speir, Jeff Bray, Eric Otte, Nevena Rakuljic, Phil Brown, Todd Weigandt, Qicheng Yu, Donald Paterson, Corey Petersen, Jeffrey C. Gealow

Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

2009

Fully Monolithic Cellular Buck Converter Design for 3-D Power Delivery.

Jian Sun, David Giuliano, Siddharth Devarajan, Jian-Qiang Lu, T. Paul Chow, Ronald J. Gutmann

IEEE Trans. Very Large Scale Integr. Syst., 2009

A 16-bit, 125 MS/s, 385 mW, 78.7 dB SNR CMOS Pipeline ADC.

Siddharth Devarajan, Larry Singer, Dan Kelly, Steven Decker, Abhishek Kamath, Paul Wilkins

IEEE J. Solid State Circuits, 2009

A 16b 125MS/s 385mW 78.7dB SNR CMOS pipeline ADC.

Siddharth Devarajan, Larry Singer, Dan Kelly, Steven Decker, Abhishek Kamath, Paul Wilkins

Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2007

Design of on-chip error correction systems for multilevel NOR and NAND flash memories.

Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Zhang

IET Circuits Devices Syst., 2007

2006

Multilevel flash memory on-chip error correction based on trellis coded modulation.

Fei Sun, Siddharth Devarajan, Kenneth Rose, Tong Zhang

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2004

A 87 dB, 2.3 GHz, SiGe BiCMOS operational transconductance amplifier.

Siddharth Devarajan, Ronald J. Gutmann, Kenneth Rose

Proceedings of the 2004 International Symposium on Circuits and Systems, 2004