Simon Reder

Orcid: 0000-0003-4282-7244

According to our database1, Simon Reder authored at least 13 papers between 2012 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Online presence:

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Bibliography

2020
Compileroptimierung und parallele Code-Generierung für zeitkritische eingebettete Multiprozessorsysteme.
PhD thesis, 2020

Interference-Aware Memory Allocation for Real-Time Multi-Core Systems.
Proceedings of the IEEE Real-Time and Embedded Technology and Applications Symposium, 2020

WCET-aware Code Generation and Communication Optimization for Parallelizing Compilers.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2019
Worst-Case Execution-Time-Aware Parallelization of Model-Based Avionics Applications.
J. Aerosp. Inf. Syst., November, 2019

2018
A WCET-aware parallel programming model for predictability enhanced multi-core architectures.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Mapping and Scheduling Hard Real Time Applications on Multicore Systems - The ARGO Approach.
Proceedings of the Applied Reconfigurable Computing. Architectures, Tools, and Applications, 2018

2017
WCET-aware parallelization of model-based applications for multi-cores: The ARGO approach.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

2015
Adaptive algorithm and tool flow for accelerating SystemC on many-core architectures.
Microprocess. Microsystems, 2015

2014
Adaptive Algorithm and Tool Flow for Accelerating System C on Many-Core Architectures.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
A SystemC modeling and simulation methodology for fast and accurate parallel MPSoC simulation.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013

Improving parallel MPSoC simulation performance by exploiting dynamic routing delay prediction.
Proceedings of the 2013 8th International Workshop on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC), 2013

2012
A Framework for exploration of parallel SystemC simulation on the single-chip cloud computer.
Proceedings of the International ICST Conference on Simulation Tools and Techniques, 2012

Asynchronous parallel MPSoC simulation on the Single-Chip Cloud Computer.
Proceedings of the 2012 International Symposium on System on Chip, 2012


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