Stelios Neophytou

Orcid: 0000-0001-5728-6845

According to our database1, Stelios Neophytou authored at least 28 papers between 2005 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2021
Identifying Metrics for an IoT Performance Estimation Framework.
Proceedings of the 10th Mediterranean Conference on Embedded Computing, 2021

Modeling the Operating Characteristics of IoT for Underwater Sound Classification.
Proceedings of the 11th IEEE Annual Computing and Communication Workshop and Conference, 2021

2020
Maintaining Scalability of Test Generation Using Multicore Shared Memory Systems.
IEEE Trans. Very Large Scale Integr. Syst., 2020

Agile Edge Classification of Ocean Sounds.
Proceedings of the 11th IEEE Annual Ubiquitous Computing, 2020

An IoT framework for Edge Processing of Ocean Sounds.
Proceedings of the 2020 International Conference on Omni-layer Intelligent Systems, 2020

2019
Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2018
Path Representation in Circuit Netlists Using Linear-Sized ZDDs with Optimal Variable Ordering.
J. Electron. Test., 2018

2016
Scalable parallel fault simulation for shared-memory multiprocessor systems.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Utilizing shared memory multi-cores to speed-up the ATPG process.
Proceedings of the 21th IEEE European Test Symposium, 2016

2015
Tackling the complexity of exact path delay fault grading for path intensive circuits.
Proceedings of the 20th IEEE European Test Symposium, 2015

2014
Multiple detection test generation with diversified fault partitioning paths.
Microprocess. Microsystems, 2014

Optimal variable ordering in ZBDD-based path representations for directed acyclic graphs.
Proceedings of the 32nd IEEE International Conference on Computer Design, 2014

Processing and Communications Rate Requirements in Sensor Networks for Physical Thread Assessment.
Proceedings of the Critical Information Infrastructures Security, 2014

2013
Test set embedding into accumulator-generated sequences targeting hard-to-detect faults.
Proceedings of the 8th International Design and Test Symposium, 2013

On the impact of fault list partitioning in parallel implementations for dynamic test compaction considering multicore systems.
Proceedings of the 8th International Design and Test Symposium, 2013

2012
Test Pattern Generation of Relaxed n-Detect Test Sets.
IEEE Trans. Very Large Scale Integr. Syst., 2012

A Non-Enumerative Technique for Measuring Path Correlation in Digital Circuits.
J. Electron. Test., 2012

2011
An Approach for Quantifying Path Correlation in Digital Circuits without any Path or Segment Enumeration.
Proceedings of the 16th European Test Symposium, 2011

2010
Test Set Generation with a Large Number of Unspecified Bits Using Static and Dynamic Techniques.
IEEE Trans. Computers, 2010

Identification of critical primitive path delay faults without any path enumeration.
Proceedings of the 28th IEEE VLSI Test Symposium, 2010

2009
Generating Diverse Test Sets for Multiple Fault Detections Based on Fault Cone Partitioning.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008
On the Relaxation of n-detect Test Sets.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Two New Methods for Accurate Test Set Relaxation via Test Set Replacement.
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

2007
Hierarchical Fault Compatibility Identification for Test Generation with a Small Number of Specified Bits.
Proceedings of the 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 2007

2006
Functions for Quality Transition-Fault Tests and Their Applications in Test-Set Enhancement.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Efficient Deterministic Test Generation for BIST Schemes with LFSR Reseeding.
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006

2005
Functions for Quality Transition Fault Tests.
Proceedings of the 6th International Symposium on Quality of Electronic Design (ISQED 2005), 2005

Test set enhancement for quality transition faults using function-based methods.
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, 2005


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