Kyriakos Christou

According to our database1, Kyriakos Christou authored at least 10 papers between 2003 and 2012.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2012
A Non-Enumerative Technique for Measuring Path Correlation in Digital Circuits.
J. Electron. Test., 2012

2011
An Approach for Quantifying Path Correlation in Digital Circuits without any Path or Segment Enumeration.
Proceedings of the 16th European Test Symposium, 2011

2010
Identification of critical primitive path delay faults without any path enumeration.
Proceedings of the 28th IEEE VLSI Test Symposium, 2010

2009
Generating Diverse Test Sets for Multiple Fault Detections Based on Fault Cone Partitioning.
Proceedings of the 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2009

2008
On the Use of ZBDDs for Implicit and Compact Critical Path Delay Fault Test Generation.
J. Electron. Test., 2008

A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions.
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors.
Proceedings of the Applications of Evolutionary Computing, 2008

2006
Implicit Critical PDF Test Generation with Maximal Test Efficiency.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006

2005
Towards finding path delay fault tests with high test efficiency using ZBDDs.
Proceedings of the 23rd International Conference on Computer Design (ICCD 2005), 2005

2003
Modeling and Analysis of Power-Aware Systems.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2003


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