Stavros Hadjitheophanous

IEEE Trans. Very Large Scale Integr. Syst., 2020

2019

Exploiting Shared-Memory to Steer Scalability of Fault Simulation Using Multicore Systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

2017

Minimal exercise vector generation for reliability improvement.

[BibT_eX]

[DOI]

P. Madhukar Reddy

Vassos Soteriou

Paul V. Gratz

Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017

2016

Scalable parallel fault simulation for shared-memory multiprocessor systems.

[BibT_eX]

[DOI]

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Utilizing shared memory multi-cores to speed-up the ATPG process.

[BibT_eX]

[DOI]

Proceedings of the 21th IEEE European Test Symposium, 2016

2015

Use It or Lose It: Proactive, Deterministic Longevity in Future Chip Multiprocessors.

[BibT_eX]

[DOI]

Hyungjun Kim

Siva Bhanu Krishna Boga

Arseniy Vitkovskiy

Paul V. Gratz

Vassos Soteriou

ACM Trans. Design Autom. Electr. Syst., 2015

2013

Edge-Directed Hardware Architecture for Real-Time Disparity Map Computation.

[BibT_eX]

[DOI]

Christos Ttofis

Athinodoros S. Georghiades

Theocharis Theocharides

IEEE Trans. Computers, 2013

Test set embedding into accumulator-generated sequences targeting hard-to-detect faults.

[BibT_eX]

[DOI]

Ioannis Voyiatzis

Stelios Neophytou

Cleo Sgouropoulou

Costas Efstathiou

Proceedings of the 8th International Design and Test Symposium, 2013

On the impact of fault list partitioning in parallel implementations for dynamic test compaction considering multicore systems.

[BibT_eX]

[DOI]

Stelios Neophytou

Proceedings of the 8th International Design and Test Symposium, 2013

2010

Towards hardware stereoscopic 3D reconstruction a real-time FPGA computation of the disparity map.

[BibT_eX]

[DOI]