Sven Reimer

According to our database1, Sven Reimer authored at least 17 papers between 2011 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
Article 
PhD thesis 
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Links

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Bibliography

2022
Making PROGRESS in Property Directed Reachability.
Proceedings of the Methods and Description Languages for Modelling and Verification of Circuits and Systems, 2022

2018
Dynamic Polynomial Watchdog Encoding for Solving Weighted MaxSAT.
Proceedings of the Theory and Applications of Satisfiability Testing - SAT 2018, 2018

2017
HQSpre - An Effective Preprocessor for QBF and DQBF.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2017

2016
On Optimal Power-Aware Path Sensitization.
Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015
Bekannte Unbekannte: formale Methoden in Anwesenheit unbekannter Werte.
PhD thesis, 2015

Accurate QBF-Based Test Pattern Generation in Presence of Unknown Values.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

Solving DQBF through quantifier elimination.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015

2014
QBF with Soft Variables.
Electron. Commun. Eur. Assoc. Softw. Sci. Technol., 2014

Efficient SAT-Based Circuit Initialization for Larger Designs.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

Using MaxBMC for Pareto-optimal circuit initialization.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

Incremental Encoding and Solving of Cardinality Constraints.
Proceedings of the Automated Technology for Verification and Analysis, 2014

2013
Equivalence Checking for Partial Implementations Revisited.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2013

Equivalence checking of partial designs using dependency quantified Boolean formulae.
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Efficient SAT-based dynamic compaction and relaxation for longest sensitizable paths.
Proceedings of the Design, Automation and Test in Europe, 2013

Provably optimal test cube generation using quantified boolean formula solving.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Enhanced Integration of QBF Solving Techniques.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), 2012

2011
Integration of orthogonal QBF solving techniques.
Proceedings of the Design, Automation and Test in Europe, 2011


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