Tahseen Shakir

According to our database, Tahseen Shakir authored at least 5 papers between 2008 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2024

7.3 A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS.

Dirk Pfaff, Muhammad Nummer, Noman Hai, Peter Xia, Kai Ge Yang, Mohammad-Mahdi Mohsenpour, Marc-Andre LaCroix, Babak Zamanlooy, Tom Eeckelaert, Dmitry Petrov, Mostafa Haroun, Carson Dick, Alif Zaman, Haitao Mei, Shahab Moazzeni, Tahseen Shakir, Carlos Carvalho, Howard Huang, Pratibha Kumari, Ralph Mason, Fahmida Brishty, Ifrah Jaffri

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2014

A body-bias based current sense amplifier for high-speed low-power embedded SRAMs.

Tahseen Shakir, Manoj Sachdev

Proceedings of the 27th IEEE International System-on-Chip Conference, 2014

2012

A read-assist write-back voltage sense amplifier for low voltage-operated SRAMs.

Tahseen Shakir, Manoj Sachdev

Proceedings of the IEEE 25th International SOC Conference, 2012

A word-line boost driver design for low operating voltage 6T-SRAMs.

Tahseen Shakir, Manoj Sachdev

Proceedings of the 55th IEEE International Midwest Symposium on Circuits and Systems, 2012

2008

A multiword based high speed ECC scheme for low-voltage embedded SRAMS.

Shah M. Jahinuzzaman, Tahseen Shakir, Sumanjit Lubana, Jaspal Singh Shah, Manoj Sachdev

Proceedings of the ESSCIRC 2008, 2008